From patchwork Thu Apr 11 09:12:37 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 2427811 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 616A3DF230 for ; Thu, 11 Apr 2013 11:43:37 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UQFud-0007y1-C0; Thu, 11 Apr 2013 11:43:31 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UQDbb-0002DC-SK; Thu, 11 Apr 2013 09:15:44 +0000 Received: from service87.mimecast.com ([91.220.42.44]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UQDbZ-0002Cq-Tk for linux-arm-kernel@lists.infradead.org; Thu, 11 Apr 2013 09:15:42 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 11 Apr 2013 10:15:39 +0100 Received: from e106331-lin.cambridge.arm.com ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.0); Thu, 11 Apr 2013 10:15:35 +0100 From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 06/11] arm: perf: dynamically allocate cpu hardware data Date: Thu, 11 Apr 2013 10:12:37 +0100 Message-Id: <1365671562-2403-7-git-send-email-mark.rutland@arm.com> X-Mailer: git-send-email 1.8.1.1 In-Reply-To: <1365671562-2403-1-git-send-email-mark.rutland@arm.com> References: <1365671562-2403-1-git-send-email-mark.rutland@arm.com> X-OriginalArrivalTime: 11 Apr 2013 09:15:35.0993 (UTC) FILETIME=[2047DA90:01CE3695] X-MC-Unique: 113041110153912501 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130411_051542_136530_3F592C96 X-CRM114-Status: GOOD ( 12.06 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [91.220.42.44 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Mark Rutland , Lorenzo.Pieralisi@arm.com, benh@kernel.crashing.org, devicetree-discuss@lists.ozlabs.org, will.deacon@arm.com, rob.herring@calxeda.com, grant.likely@secretlab.ca, dave.martin@arm.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org To support multiple PMUs, each PMU will need its own accounting data. As we don't know how (in general) many PMUs we'll have to support at compile-time, we must allocate the data at runtime dynamically Signed-off-by: Mark Rutland Reviewed-by: Will Deacon --- arch/arm/kernel/perf_event_cpu.c | 73 ++++++++++++++++++++++++++++------------ 1 file changed, 51 insertions(+), 22 deletions(-) diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c index 80f1a26..ae5be75 100644 --- a/arch/arm/kernel/perf_event_cpu.c +++ b/arch/arm/kernel/perf_event_cpu.c @@ -33,9 +33,25 @@ /* Set at runtime when we know what CPU type we are. */ static struct arm_pmu *cpu_pmu; -static DEFINE_PER_CPU(struct perf_event * [ARMPMU_MAX_HWEVENTS], hw_events); -static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)], used_mask); -static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events); +/* + * All of the dynamically sized pmu_hw data for the number of events supported + * by CPU PMUs, aggregated together for easier allocation / freeing. + */ +struct cpu_pmu_hw { + struct pmu_hw_events cpu_hw_events; + struct perf_event *hw_events[ARMPMU_MAX_HWEVENTS]; + unsigned long used_mask[BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)]; +}; + +/* + * For mapping between an arm_pmu for a CPU and its CPU-affine data. + */ +struct cpu_pmu { + struct arm_pmu armpmu; + struct cpu_pmu_hw __percpu *cpu_hw; +}; + +#define to_cpu_pmu(p) (container_of(p, struct cpu_pmu, armpmu)) /* * Despite the names, these two functions are CPU-specific and are used @@ -68,7 +84,9 @@ EXPORT_SYMBOL_GPL(perf_num_counters); static struct pmu_hw_events *cpu_pmu_get_cpu_events(struct arm_pmu *pmu) { - return &__get_cpu_var(cpu_hw_events); + struct cpu_pmu *cpu_pmu = to_cpu_pmu(pmu); + struct cpu_pmu_hw *hw = this_cpu_ptr(cpu_pmu->cpu_hw); + return &hw->cpu_hw_events; } static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu) @@ -132,23 +150,25 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler) return 0; } -static void cpu_pmu_init(struct arm_pmu *cpu_pmu) +static void cpu_pmu_init(struct cpu_pmu *cpu_pmu) { int cpu; + struct arm_pmu *arm_pmu = &cpu_pmu->armpmu; + for_each_possible_cpu(cpu) { - struct pmu_hw_events *events = &per_cpu(cpu_hw_events, cpu); - events->events = per_cpu(hw_events, cpu); - events->used_mask = per_cpu(used_mask, cpu); - raw_spin_lock_init(&events->pmu_lock); + struct cpu_pmu_hw *cpu_hw = per_cpu_ptr(cpu_pmu->cpu_hw, cpu); + cpu_hw->cpu_hw_events.events = cpu_hw->hw_events; + cpu_hw->cpu_hw_events.used_mask = cpu_hw->used_mask; + raw_spin_lock_init(&cpu_hw->cpu_hw_events.pmu_lock); } - cpu_pmu->get_hw_events = cpu_pmu_get_cpu_events; - cpu_pmu->request_irq = cpu_pmu_request_irq; - cpu_pmu->free_irq = cpu_pmu_free_irq; + arm_pmu->get_hw_events = cpu_pmu_get_cpu_events; + arm_pmu->request_irq = cpu_pmu_request_irq; + arm_pmu->free_irq = cpu_pmu_free_irq; /* Ensure the PMU has sane values out of reset. */ - if (cpu_pmu->reset) - on_each_cpu(cpu_pmu->reset, cpu_pmu, 1); + if (arm_pmu->reset) + on_each_cpu(arm_pmu->reset, arm_pmu, 1); } /* @@ -255,7 +275,7 @@ static int cpu_pmu_device_probe(struct platform_device *pdev) const struct of_device_id *of_id; int (*init_fn)(struct arm_pmu *); struct device_node *node = pdev->dev.of_node; - struct arm_pmu *pmu; + struct cpu_pmu *pmu; int ret = -ENODEV; if (cpu_pmu) { @@ -263,34 +283,43 @@ static int cpu_pmu_device_probe(struct platform_device *pdev) return -ENOSPC; } - pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL); + pmu = kzalloc(sizeof(*pmu), GFP_KERNEL); if (!pmu) { pr_info("failed to allocate PMU device!"); return -ENOMEM; } + pmu->cpu_hw = alloc_percpu(struct cpu_pmu_hw); + if (!pmu->cpu_hw) { + pr_info("failed to allocate PMU hw data!\n"); + ret = -ENOMEM; + goto out_pmu; + } + if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) { init_fn = of_id->data; - ret = init_fn(pmu); + ret = init_fn(&pmu->armpmu); } else { - ret = probe_current_pmu(pmu); + ret = probe_current_pmu(&pmu->armpmu); } if (ret) { pr_info("failed to probe PMU!"); - goto out_free; + goto out_hw; } - cpu_pmu = pmu; + cpu_pmu = &pmu->armpmu; cpu_pmu->plat_device = pdev; - cpu_pmu_init(cpu_pmu); + cpu_pmu_init(pmu); ret = armpmu_register(cpu_pmu, -1); if (!ret) return 0; -out_free: +out_hw: + free_percpu(pmu->cpu_hw); pr_info("failed to register PMU devices!"); +out_pmu: kfree(pmu); return ret; }