From patchwork Mon Apr 15 08:40:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: girishks2000@gmail.com X-Patchwork-Id: 2444361 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 506E53FD8C for ; Mon, 15 Apr 2013 08:42:25 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UReyo-0003aU-H1; Mon, 15 Apr 2013 08:41:40 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UReyV-0004bQ-P1; Mon, 15 Apr 2013 08:41:19 +0000 Received: from mail-pd0-f170.google.com ([209.85.192.170]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UReyB-0004Zf-Qa for linux-arm-kernel@lists.infradead.org; Mon, 15 Apr 2013 08:41:01 +0000 Received: by mail-pd0-f170.google.com with SMTP id 10so2390790pdi.1 for ; Mon, 15 Apr 2013 01:40:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=tePL+jeMfCCkiaxd61Z4AqBjrVpiNhCplb7NAYsYjD8=; b=LVsuTJAmg8AcSphCOZVFo88YSzX5coscmw2aAX7Y+wpMdR7ggGDMgeaKfd72IhF/Ww 1vb+ViUk35Vd3oaOO9Sa1qzjw3n2WzP8HbS3Xu2WYVp0O0okEcJJAcafy8q4YUg/Z9TE K4NuUNBmx5lyg41xZGW79cuecLMMkGmnKm0mVgbE72aWrQekuf2niR4ddivyboCO4mhQ y2uqTB5E12bImIvHhDN29g54ECmpTu6qovajbtvE/17Fl1XZTpiBvWFDMiX+HcKlqDFM AB5gI+sPu6rrdEU0lCTo35ymZJbUr4lq6t3iuxLpes6YucyarbW4I0xGkP9fvxil1tE8 XPeA== X-Received: by 10.66.222.228 with SMTP id qp4mr28302780pac.113.1366015258295; Mon, 15 Apr 2013 01:40:58 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id fa5sm19493310pbb.35.2013.04.15.01.40.55 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 15 Apr 2013 01:40:57 -0700 (PDT) From: Girish K S To: spi-devel-general@lists.sourceforge.net, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH V4 4/5] spi: s3c64xx: Added provision for dedicated cs pin Date: Mon, 15 Apr 2013 14:10:29 +0530 Message-Id: <1366015230-18243-3-git-send-email-ks.giri@samsung.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1366015230-18243-1-git-send-email-ks.giri@samsung.com> References: <1366015230-18243-1-git-send-email-ks.giri@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130415_044100_005943_557005DD X-CRM114-Status: GOOD ( 18.92 ) X-Spam-Score: -1.8 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.8 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [209.85.192.170 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (girishks2000[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (girishks2000[at]gmail.com) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: grant.likely@secretlab.ca, t.figa@samsung.com, broonie@opensource.wolfsonmicro.com, Girish K S X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Girish K S The existing driver supports gpio based /cs signal. For controller's that have one device per controller, the slave device's /cs signal might be internally controlled by the chip select bit of slave select register. They are not externally asserted/deasserted using gpio pin. This patch adds support for controllers with dedicated /cs pin. if "cs-gpio" property doesnt exist in a spi dts node, the controller would treat the /cs pin as dedicated. Signed-off-by: Girish K S --- changes in v4: moved the struct member cs_gpio from platform data to driver private data. changes in v3: detelted the quirk for GPIO and handled it in the dts file changes in v2: separated the gpio ios and cs gpio as separate patches drivers/spi/spi-s3c64xx.c | 32 ++++++++++++++++++++++++-------- 1 files changed, 24 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 79de18f..7fdc940 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -202,6 +202,7 @@ struct s3c64xx_spi_driver_data { struct s3c64xx_spi_port_config *port_conf; unsigned int port_id; unsigned long gpios[4]; + bool cs_gpio; }; static struct s3c2410_dma_client s3c64xx_spi_dma_client = { @@ -414,14 +415,16 @@ static inline void enable_cs(struct s3c64xx_spi_driver_data *sdd, if (sdd->tgl_spi != spi) { /* if last mssg on diff device */ /* Deselect the last toggled device */ cs = sdd->tgl_spi->controller_data; - gpio_set_value(cs->line, - spi->mode & SPI_CS_HIGH ? 0 : 1); + if (sdd->cs_gpio) + gpio_set_value(cs->line, + spi->mode & SPI_CS_HIGH ? 0 : 1); } sdd->tgl_spi = NULL; } cs = spi->controller_data; - gpio_set_value(cs->line, spi->mode & SPI_CS_HIGH ? 1 : 0); + if (sdd->cs_gpio) + gpio_set_value(cs->line, spi->mode & SPI_CS_HIGH ? 1 : 0); /* Start the signals */ writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL); @@ -550,7 +553,8 @@ static inline void disable_cs(struct s3c64xx_spi_driver_data *sdd, if (sdd->tgl_spi == spi) sdd->tgl_spi = NULL; - gpio_set_value(cs->line, spi->mode & SPI_CS_HIGH ? 0 : 1); + if (sdd->cs_gpio) + gpio_set_value(cs->line, spi->mode & SPI_CS_HIGH ? 0 : 1); /* Quiese the signals */ writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); @@ -888,7 +892,10 @@ static struct s3c64xx_spi_csinfo *s3c64xx_get_slave_ctrldata( return ERR_PTR(-ENOMEM); } - cs->line = of_get_named_gpio(data_np, "cs-gpio", 0); + /* The CS line is asserted/deasserted by the gpio pin */ + if (sdd->cs_gpio) + cs->line = of_get_named_gpio(data_np, "cs-gpio", 0); + if (!gpio_is_valid(cs->line)) { dev_err(&spi->dev, "chip select gpio is not specified or invalid\n"); kfree(cs); @@ -928,7 +935,8 @@ static int s3c64xx_spi_setup(struct spi_device *spi) return -ENODEV; } - if (!spi_get_ctldata(spi)) { + /* Request gpio only if cs line is asserted by gpio pins */ + if (sdd->cs_gpio) { err = gpio_request_one(cs->line, GPIOF_OUT_INIT_HIGH, dev_name(&spi->dev)); if (err) { @@ -937,9 +945,11 @@ static int s3c64xx_spi_setup(struct spi_device *spi) cs->line, err); goto err_gpio_req; } - spi_set_ctldata(spi, cs); } + if (!spi_get_ctldata(spi)) + spi_set_ctldata(spi, cs); + sci = sdd->cntrlr_info; spin_lock_irqsave(&sdd->lock, flags); @@ -1026,8 +1036,10 @@ err_gpio_req: static void s3c64xx_spi_cleanup(struct spi_device *spi) { struct s3c64xx_spi_csinfo *cs = spi_get_ctldata(spi); + struct s3c64xx_spi_driver_data *sdd; - if (cs) { + sdd = spi_master_get_devdata(spi->master); + if (cs && sdd->cs_gpio) { gpio_free(cs->line); if (spi->dev.of_node) kfree(cs); @@ -1256,7 +1268,11 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) sdd->cntrlr_info = sci; sdd->pdev = pdev; sdd->sfr_start = mem_res->start; + sdd->cs_gpio = false; if (pdev->dev.of_node) { + if (of_find_property(pdev->dev.of_node, "cs-gpio", NULL)) + sdd->cs_gpio = true; + ret = of_alias_get_id(pdev->dev.of_node, "spi"); if (ret < 0) { dev_err(&pdev->dev, "failed to get alias id, errno %d\n",