From patchwork Mon Apr 15 12:42:28 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 2444881 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 9D2CA3FD8C for ; Mon, 15 Apr 2013 12:43:23 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1URikU-0006qD-Pc; Mon, 15 Apr 2013 12:43:07 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1URikO-00019I-68; Mon, 15 Apr 2013 12:43:00 +0000 Received: from hqemgate04.nvidia.com ([216.228.121.35]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1URikH-000183-4w for linux-arm-kernel@lists.infradead.org; Mon, 15 Apr 2013 12:42:54 +0000 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Mon, 15 Apr 2013 05:42:54 -0700 Received: from hqemhub03.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Mon, 15 Apr 2013 05:41:11 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Mon, 15 Apr 2013 05:41:11 -0700 Received: from jlo-ubuntu-64.nvidia.com (172.20.144.16) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.298.1; Mon, 15 Apr 2013 05:42:51 -0700 From: Joseph Lo To: Stephen Warren Subject: [PATCH 2/3] ARM: tegra: fix relocation truncated error when THUMB2_KERNEL enabled Date: Mon, 15 Apr 2013 20:42:28 +0800 Message-ID: <1366029749-16476-2-git-send-email-josephl@nvidia.com> X-Mailer: git-send-email 1.8.2 In-Reply-To: <1366029749-16476-1-git-send-email-josephl@nvidia.com> References: <1366029749-16476-1-git-send-email-josephl@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130415_084253_377894_ED3B096D X-CRM114-Status: UNSURE ( 8.54 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -7.5 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [216.228.121.35 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.6 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Joseph Lo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The conditional branch instruction in Thumb2 only available to short range. The linker will fail when the conditional branch over the range. Then resulting in link error when generating kernel image. e.g.: arch/arm/mach-tegra/reset-handler.S:47:(.text+0xf8e): relocation truncated to fit: R_ARM_THM_JUMP19 against symbol `cpu_resume' defined in .data section in arch/arm/kernel/built-in.o This patch using a Thumb2 instruction IT (if-then) to have a longer branch range. Reported-by: Arnd Bergmann Signed-off-by: Joseph Lo --- arch/arm/mach-tegra/reset-handler.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index 1676aba..e6de88a 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -44,6 +44,7 @@ ENTRY(tegra_resume) cpu_id r0 cmp r0, #0 @ CPU0? + THUMB( it ne ) bne cpu_resume @ no #ifdef CONFIG_ARCH_TEGRA_3x_SOC