From patchwork Thu May 2 09:12:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 2510711 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 0835C3FCA5 for ; Thu, 2 May 2013 09:14:02 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UXpZx-0002lD-Qq; Thu, 02 May 2013 09:13:30 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UXpZl-0004BO-BC; Thu, 02 May 2013 09:13:17 +0000 Received: from eu1sys200aog124.obsmtp.com ([207.126.144.157]) by merlin.infradead.org with smtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UXpZi-00048r-VM for linux-arm-kernel@lists.infradead.org; Thu, 02 May 2013 09:13:15 +0000 Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob124.postini.com ([207.126.147.11]) with SMTP ID DSNKUYIuCyNuyP8h7ZWzeCIoAyiXDWsu1X8b@postini.com; Thu, 02 May 2013 09:13:14 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 47A20102; Thu, 2 May 2013 09:04:31 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 4A8A519D0; Thu, 2 May 2013 09:12:37 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 8C9BFA8081; Thu, 2 May 2013 11:12:32 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.279.5; Thu, 2 May 2013 11:12:44 +0200 From: Linus Walleij To: Subject: [PATCH 20/23 v2] ARM: u300: add SPI PL022 to the device tree Date: Thu, 2 May 2013 11:12:32 +0200 Message-ID: <1367485952-6212-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130502_051315_234134_0CB7EDA7 X-CRM114-Status: GOOD ( 17.95 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [207.126.144.157 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: devicetree-discuss@lists.ozlabs.org, Mark Brown , Linus Walleij , Arnd Bergmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Linus Walleij This registers the PL022 PrimeCell from the U300 device tree. We make a new copy of the platform data for the device tree boot path, as the old platform data is in an older file which will be going away. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Add DMA channels. --- arch/arm/boot/dts/ste-u300.dts | 11 +++++++++++ arch/arm/mach-u300/core.c | 19 +++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts index 4dc9f26..46c0785 100644 --- a/arch/arm/boot/dts/ste-u300.dts +++ b/arch/arm/boot/dts/ste-u300.dts @@ -222,5 +222,16 @@ dmas = <&dmac 14>; dma-names = "rx"; }; + + spi: ssp@c0006000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0xc0006000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <23>; + dmas = <&dmac 27 &dmac 28>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + }; }; }; diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 98d4dbe..9467ffe 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -703,6 +704,22 @@ MACHINE_END #ifdef CONFIG_OF +static struct pl022_ssp_controller spi_plat_data = { + /* If you have several SPI buses this varies, we have only bus 0 */ + .bus_id = 0, + /* + * On the APP CPU GPIO 4, 5 and 6 are connected as generic + * chip selects for SPI. (Same on U330, U335 and U365.) + * TODO: make sure the GPIO driver can select these properly + * and do padmuxing accordingly too. + */ + .num_chipselect = 3, + .enable_dma = 1, + .dma_filter = coh901318_filter_id, + .dma_rx_param = (void *) U300_DMA_SPI_RX, + .dma_tx_param = (void *) U300_DMA_SPI_TX, +}; + /* These are mostly to get the right device names for the clock lookups */ static struct of_dev_auxdata u300_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("stericsson,pinctrl-u300", U300_SYSCON_BASE, @@ -719,6 +736,8 @@ static struct of_dev_auxdata u300_auxdata_lookup[] __initdata = { "uart0", &uart0_plat_data), OF_DEV_AUXDATA("arm,primecell", U300_UART1_BASE, "uart1", &uart1_plat_data), + OF_DEV_AUXDATA("arm,primecell", U300_SPI_BASE, + "pl022", &spi_plat_data), OF_DEV_AUXDATA("st,ddci2c", U300_I2C0_BASE, "stu300.0", NULL), OF_DEV_AUXDATA("st,ddci2c", U300_I2C1_BASE,