@@ -75,6 +75,11 @@
ti,hwmods = "counter_32k";
};
+ sysclk: sys {
+ #clock-cells = <0>;
+ compatible = "ti,omap-clock";
+ };
+
dpll1: dpll1 {
#clock-cells = <0>;
compatible = "ti,omap-clock";
@@ -34,5 +34,25 @@
ti,hwmods = "uart4";
clock-frequency = <48000000>;
};
+
+ abb_mpu_iva: regulator-abb-mpu {
+ compatible = "ti,abb-v1";
+ regulator-name = "abb_mpu_iva";
+ #address-cell = <0>;
+ #size-cells = <0>;
+ reg = <0x483072f0 0x8>, <0x48306818 0x4>;
+ reg-names = "base-address", "int-address";
+ ti,tranxdone-status-mask = <0x4000000>;
+ clocks = <&sysclk>;
+ ti,settling-time = <30>;
+ ti,clock-cycles = <8>;
+ ti,abb_info = <
+ /*uV ABB efuse rbb_m fbb_m vset_m*/
+ 1012500 0 0 0 0 0
+ 1200000 0 0 0 0 0
+ 1325000 0 0 0 0 0
+ 1375000 1 0 0 0 0
+ >;
+ };
};
};