From patchwork Thu May 2 17:20:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 2513221 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id A7F353FCA5 for ; Thu, 2 May 2013 17:23:20 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UXxCg-00023c-1I; Thu, 02 May 2013 17:21:59 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UXxC7-0005gm-Dq; Thu, 02 May 2013 17:21:23 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UXxBX-0005Zi-TZ for linux-arm-kernel@lists.infradead.org; Thu, 02 May 2013 17:20:55 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id r42HKMcK013371; Thu, 2 May 2013 12:20:22 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r42HKMYc010916; Thu, 2 May 2013 12:20:22 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Thu, 2 May 2013 12:20:21 -0500 Received: from localhost (kahuna.am.dhcp.ti.com [128.247.91.59]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r42HKMTP002621; Thu, 2 May 2013 12:20:22 -0500 From: Nishanth Menon To: Mark Brown , Kevin Hilman , Mike Turquette Subject: [PATCH v3 5/5] ARM: dts: OMAP5: Add device nodes for ABB Date: Thu, 2 May 2013 12:20:14 -0500 Message-ID: <1367515215-30753-6-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1367515215-30753-1-git-send-email-nm@ti.com> References: <1367515215-30753-1-git-send-email-nm@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130502_132048_236806_8D8D11B5 X-CRM114-Status: UNSURE ( 8.87 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -9.4 (---------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-9.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.153 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -2.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Nishanth Menon , "Andrii.Tseglytskyi" , linux-doc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: "Andrii.Tseglytskyi" Add ABB device nodes for OMAP5 family of devices. Data is based on OMAP543x Technical Reference Manual revision U (April 2013). NOTE: clock node has been disabled in this patch due to the lack of OMAP5 clock data. [nm@ti.com: co-developer] Signed-off-by: Nishanth Menon Signed-off-by: Andrii.Tseglytskyi --- arch/arm/boot/dts/omap5.dtsi | 67 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 3dd7ff8..a9d86d2 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -667,5 +667,72 @@ ctrl-module = <&omap_control_usb>; }; }; + + abb_mpu: regulator-abb-mpu { + compatible = "ti,abb-v2"; + regulator-name = "abb_mpu"; + #address-cells = <0>; + #size-cells = <0>; + /* clocks = <&sysclk_in>; - once we have clock data */ + ti,settling-time = <50>; + ti,clock-cycles = <16>; + + reg = <0x4ae07cdc 0x8>, <0x4ae06014 0x4>, + <0x4a0021ac 0x18>, <0x4ae0C318 0x4>; + reg-names = "base-address", "int-address", + "efuse-address", "ldo-address"; + ti,tranxdone-status-mask = <0x80>; + /* LDOVBBMPU_MUX_CTRL */ + ti,ldovbb-override-mask = <0x400>; + /* LDOVBBMPU_VSET_OUT */ + ti,ldovbb-vset-mask = <0x1F>; + + /* + * NOTE: only FBB mode used but actual vset will + * determine final biasing + */ + ti,abb_info = < + /*uV ABB efuse rbb_m fbb_m vset_m*/ + 880000 0 0x4 0 0x20000000 0x1F000000 + 1060000 0 0x8 0 0x20000000 0x1F000000 + 1250000 0 0x10 0 0x20000000 0x1F000000 + 1260000 1 0x14 0 0x20000000 0x1F000000 + >; + + status = "disabled"; + }; + + abb_mm: regulator-abb-mm { + compatible = "ti,abb-v2"; + regulator-name = "abb_iva"; + #address-cells = <0>; + #size-cells = <0>; + /* clocks = <&sysclk_in>; - once we have clock data */ + ti,settling-time = <50>; + ti,clock-cycles = <16>; + + reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>, + <0x4a002194 0x14>, <0x4ae0C314 0x4>; + reg-names = "base-address", "int-address", + "efuse-address", "ldo-address"; + ti,tranxdone-status-mask = <0x80000000>; + /* LDOVBBMM_MUX_CTRL */ + ti,ldovbb-override-mask = <0x400>; + /* LDOVBBMM_VSET_OUT */ + ti,ldovbb-vset-mask = <0x1F>; + + /* + * NOTE: only FBB mode used but actual vset will + * determine final biasing + */ + ti,abb_info = < + /*uV ABB efuse rbb_m fbb_m vset_m*/ + 880000 0 0x4 0 0x20000000 0x1F000000 + 1025000 0 0x8 0 0x20000000 0x1F000000 + 1120000 1 0x10 0 0x20000000 0x1F000000 + >; + + status = "disabled"; + }; }; };