From patchwork Thu May 2 18:25:39 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 2513481 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id DB6793FD85 for ; Thu, 2 May 2013 18:28:48 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UXyE5-0003Ws-Nx; Thu, 02 May 2013 18:27:31 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UXyDG-0007TJ-Q6; Thu, 02 May 2013 18:26:38 +0000 Received: from mail-bk0-x230.google.com ([2a00:1450:4008:c01::230]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UXyD2-0007QL-Ev for linux-arm-kernel@lists.infradead.org; Thu, 02 May 2013 18:26:28 +0000 Received: by mail-bk0-f48.google.com with SMTP id jf3so384586bkc.7 for ; Thu, 02 May 2013 11:26:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=fXFFPr94KeS0JM6TbpiKmoBAOomfW3ntS8Cp4DcBawM=; b=lrvrpnO8on/++ZGnuWhabQTue4vn2rHppDSNw10t+EpcwUTO4qakaQsA+6/q8JIwTQ 2qQ13/F1j80mUv1xpcPGMG12lDOK0V9pZTxQlzaHyXWIYPK7mAEDqQ8Jn/XkjXKMLS/8 bjfMpdI48tqMuOcsetThcIN03xW7TQhRraNH0mFDOKx1cqaLRKO/cT99J+/Nxx6zWnDS u6U9EnMa+WKwImOm7Q5unv550zeIlmex6EyFsy0Tox2EinyVES5vHP4vqnObpbErL4Ak aYjWVVjn95O3x8p99OFmCspWEN0PWAMYvu1SQi2apz9zVFYS0MFileagkLXU2nTPDx2n y0AA== X-Received: by 10.204.188.17 with SMTP id cy17mr2483587bkb.114.1367519162502; Thu, 02 May 2013 11:26:02 -0700 (PDT) Received: from topkick.lan (dslc-082-083-251-181.pools.arcor-ip.net. [82.83.251.181]) by mx.google.com with ESMTPSA id f14sm1670158bky.16.2013.05.02.11.26.00 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 02 May 2013 11:26:01 -0700 (PDT) Received: from picnic.unix.mst.uni-hannover.de (phire.mst.uni-hannover.de [130.75.30.51]) by topkick.lan (Postfix) with ESMTPSA id 45DD3605D0; Thu, 2 May 2013 20:25:35 +0200 (CEST) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH 2/3] ARM: dove: add DT parsing for legacy timer Date: Thu, 2 May 2013 20:25:39 +0200 Message-Id: <1367519140-19716-3-git-send-email-sebastian.hesselbarth@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1367519140-19716-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1367519140-19716-1-git-send-email-sebastian.hesselbarth@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130502_142624_736364_9173B1DB X-CRM114-Status: GOOD ( 19.17 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (sebastian.hesselbarth[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Thomas Petazzoni , Andrew Lunn , Russell King , Jason Cooper , Arnd Bergmann , Jean-Francois Moine , devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Gregory Clement , Rob Landley , Grant Likely , Thomas Gleixner , Ezequiel Garcia , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org To allow to move to orion irqchip driver, existing legacy devices have to map their irqs. This patch adds a node for orion timer and some init code to map the corresponding irqs. While the device tree node can stay, the init code will vanish as soon as there is true device tree support for orion timer. Signed-off-by: Sebastian Hesselbarth --- Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: Thomas Gleixner Cc: Russell King Cc: Arnd Bergmann Cc: Jason Cooper Cc: Andrew Lunn Cc: Thomas Petazzoni Cc: Gregory Clement Cc: Ezequiel Garcia Cc: Jean-Francois Moine Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-doc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/dove.dtsi | 7 ++++++ arch/arm/mach-dove/board-dt.c | 42 +++++++++++++++++++++++++++++++++++----- 2 files changed, 43 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index ea7c5da..433cca1 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -30,6 +30,13 @@ marvell,tauros2-cache-features = <0>; }; + timer: timer { + compatible = "marvell,orion-timer"; + reg = <0x20300 0x20>; + interrupts = <0>; + clocks = <&core_clk 0>; + }; + intc: interrupt-controller { compatible = "marvell,orion-intc"; interrupt-controller; diff --git a/arch/arm/mach-dove/board-dt.c b/arch/arm/mach-dove/board-dt.c index 9df6dd7..cea65b7 100644 --- a/arch/arm/mach-dove/board-dt.c +++ b/arch/arm/mach-dove/board-dt.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -20,6 +21,7 @@ #include #include #include +#include #include "common.h" /* @@ -48,10 +50,42 @@ static void __init dove_legacy_clk_init(void) of_clk_get_from_provider(&clkspec)); } -static void __init dove_of_clk_init(void) +#define BRIDGE_INT_TIMER1_CLR (~0x0004) + +static void __init dove_legacy_timer_init(void) { + struct device_node *np = of_find_compatible_node(NULL, NULL, + "marvell,orion-timer"); + struct clk *clk; + void __iomem *base; + unsigned int tclk, irq; + + /* Setup root of clk tree */ mvebu_clocks_init(); dove_legacy_clk_init(); + + if (!np) + panic("missing timer node\n"); + + base = of_iomap(np, 0); + if (!base) + panic("%s: missing reg base for timer\n", np->full_name); + + irq = irq_of_parse_and_map(np, 0); + if (!irq) + panic("%s: missing irq for timer\n", np->full_name); + + clk = of_clk_get(np, 0); + if (IS_ERR(clk)) + panic("%s: missing clock for timer\n", np->full_name); + + clk_prepare_enable(clk); + tclk = clk_get_rate(clk); + clk_put(clk); + + orion_time_set_base(base); + /* legacy timer init gets bridge reg base */ + orion_time_init(base - 0x300, BRIDGE_INT_TIMER1_CLR, irq, tclk); } static struct mv643xx_eth_platform_data dove_dt_ge00_data = { @@ -95,9 +129,6 @@ static void __init dove_dt_init(void) #endif dove_setup_cpu_mbus(); - /* Setup root of clk tree */ - dove_of_clk_init(); - /* Internal devices not ported to DT yet */ dove_legacy_ge00_init(); dove_pcie_init(1, 1); @@ -112,9 +143,8 @@ static const char * const dove_dt_board_compat[] = { DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)") .map_io = dove_map_io, - .init_early = dove_init_early, .init_irq = orion_dt_init_irq, - .init_time = dove_timer_init, + .init_time = dove_legacy_timer_init, .init_machine = dove_dt_init, .restart = dove_restart, .dt_compat = dove_dt_board_compat,