From patchwork Mon May 6 12:32:12 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 2523961 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id DE854DF230 for ; Mon, 6 May 2013 12:33:28 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UZKbS-0008VC-0e; Mon, 06 May 2013 12:33:14 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UZKbL-0003Zl-CM; Mon, 06 May 2013 12:33:07 +0000 Received: from mail-bk0-x234.google.com ([2a00:1450:4008:c01::234]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UZKb9-0003Xf-FR for linux-arm-kernel@lists.infradead.org; Mon, 06 May 2013 12:32:58 +0000 Received: by mail-bk0-f52.google.com with SMTP id q16so1551170bkw.11 for ; Mon, 06 May 2013 05:32:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=pSGMQ9wfvO+4l9HBP1PhbyOYNHqly4N9diTDZt+yNfs=; b=wxIPx2gif+IbkPxKimf/GrbXZNGzM9oMMtnOAxMyYQ39JweVxIFsONm26ZhlYhpQUb O8tra4ykYscZa0ya0qHkEfHGLqpUnLi3yz1HwK9M3oKd4gizh+NZUlqaIE8oKhRjsWx0 Xfc3HZfGFFcK3mNddcIQ+hVUwYUS4RKHdOlr7L3niMPud5yHmIg4fPjxtsebLG1ImlUi oJ8vyo8Uzj+28mGwiR4mD2za4LBaHnBU9OQ3YuQGtnL3G+a4pHTcG28rZtFcuMU/eieA 3zo+N59toasGCX2ymXW8+DFE20sHzMMSj+COBQ4D3hy3dkSXqyqzo/7ejPK9ideU23xr LagQ== X-Received: by 10.204.172.136 with SMTP id l8mr8491493bkz.49.1367843550119; Mon, 06 May 2013 05:32:30 -0700 (PDT) Received: from topkick.lan (dslc-082-083-251-181.pools.arcor-ip.net. [82.83.251.181]) by mx.google.com with ESMTPSA id v6sm5343092bko.3.2013.05.06.05.32.27 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 06 May 2013 05:32:28 -0700 (PDT) Received: from edge.wm.mst.uni-hannover.de (phire.mst.uni-hannover.de [130.75.30.51]) by topkick.lan (Postfix) with ESMTPSA id 8C62F60538; Mon, 6 May 2013 14:31:57 +0200 (CEST) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [RFC patch 7/8] fixup 1/2: genirq: generic chip: Add linear irq domain support Date: Mon, 6 May 2013 14:32:12 +0200 Message-Id: <1367843533-7117-1-git-send-email-sebastian.hesselbarth@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <20130503214629.810207749@linutronix.de> References: <20130503214629.810207749@linutronix.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130506_083255_771519_DF757F65 X-CRM114-Status: GOOD ( 19.79 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (sebastian.hesselbarth[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Thomas Petazzoni , Andrew Lunn , Russell King - ARM Linux , Jason Cooper , Arnd Bergmann , Jean-Francois Moine , devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Jason Gunthorpe , Gregory Clement , Gerlando Falauto , Rob Landley , Uwe Kleine-Koenig , Grant Likely , Thomas Gleixner , Ezequiel Garcia , Maxime Ripard , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org irq_domain_chip_generic is allocating and indexing irq_chip_generic itself. However, the size of irq_chip_generic varies with number of irq_chip_types. This fixup moves irq_chip_generic helt by irq_domain_chip_generic to array of ptr and fixes the pointer arith used by irq_alloc_domain_generic_chip. Signed-off-by: Sebastian Hesselbarth --- Cc: Thomas Gleixner Cc: Russell King - ARM Linux Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: Arnd Bergmann Cc: Jason Cooper Cc: Andrew Lunn Cc: Jason Gunthorpe Cc: Thomas Petazzoni Cc: Gregory Clement Cc: Ezequiel Garcia Cc: Maxime Ripard Cc: Jean-Francois Moine Cc: Gerlando Falauto Cc: Uwe Kleine-Koenig Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-doc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- include/linux/irq.h | 4 ++-- kernel/irq/generic-chip.c | 20 +++++++++++++------- 2 files changed, 15 insertions(+), 9 deletions(-) diff --git a/include/linux/irq.h b/include/linux/irq.h index 7315155..fd2d7cb 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -730,7 +730,7 @@ enum irq_gc_flags { * @irq_flags_to_set: IRQ* flags to set on irq setup * @irq_flags_to_clear: IRQ* flags to clear on irq setup * @gc_flags: Generic chip specific setup flags - * @gc: Array of generic interrupt chips + * @gc: Array of pointer to generic interrupt chips */ struct irq_domain_chip_generic { unsigned int irqs_per_chip; @@ -738,7 +738,7 @@ struct irq_domain_chip_generic { unsigned int irq_flags_to_clear; unsigned int irq_flags_to_set; enum irq_gc_flags gc_flags; - struct irq_chip_generic gc[0]; + struct irq_chip_generic *gc[0]; }; /* Generic chip callback functions */ diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c index e212b26..3dbfe2e 100644 --- a/kernel/irq/generic-chip.c +++ b/kernel/irq/generic-chip.c @@ -247,6 +247,7 @@ int irq_alloc_domain_generic_chips(struct irq_domain *d, int irqs_per_chip, struct irq_chip_generic *gc; int numchips, sz, i; unsigned long flags; + void *p; if (d->gc) return -EBUSY; @@ -260,9 +261,9 @@ int irq_alloc_domain_generic_chips(struct irq_domain *d, int irqs_per_chip, sz = sizeof(*gc) + num_ct * sizeof(struct irq_chip_type); sz *= numchips; - sz += sizeof(*dgc); + sz += sizeof(*dgc) + numchips * sizeof(void *); - dgc = kzalloc(sz, GFP_KERNEL); + p = dgc = kzalloc(sz, GFP_KERNEL); if (!dgc) return -ENOMEM; dgc->irqs_per_chip = irqs_per_chip; @@ -270,17 +271,22 @@ int irq_alloc_domain_generic_chips(struct irq_domain *d, int irqs_per_chip, dgc->irq_flags_to_set = set; dgc->irq_flags_to_clear = clr; dgc->gc_flags = gcflags; - gc = dgc->gc; + d->gc = dgc; - for (i = 0; i < numchips; i++, gc++) { + p += sizeof(*dgc) + numchips * sizeof(void *); + for (i = 0; i < numchips; i++) { + gc = (struct irq_chip_generic *)p; + dgc->gc[i] = gc; irq_init_generic_chip(gc, name, num_ct, i * irqs_per_chip, NULL, handler); gc->domain = d; + raw_spin_lock_irqsave(&gc_lock, flags); list_add_tail(&gc->list, &gc_list); raw_spin_unlock_irqrestore(&gc_lock, flags); + + p += sizeof(*gc) + num_ct * sizeof(struct irq_chip_type); } - d->gc = dgc; return 0; } EXPORT_SYMBOL_GPL(irq_alloc_domain_generic_chips); @@ -301,7 +307,7 @@ irq_get_domain_generic_chip(struct irq_domain *d, unsigned int hw_irq) idx = hw_irq / dgc->irqs_per_chip; if (idx >= dgc->num_chips) return NULL; - return &dgc->gc[idx]; + return dgc->gc[idx]; } EXPORT_SYMBOL_GPL(irq_get_domain_generic_chip); @@ -331,7 +337,7 @@ static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq, idx = hw_irq / dgc->irqs_per_chip; if (idx >= dgc->num_chips) return -EINVAL; - gc = &dgc->gc[idx]; + gc = dgc->gc[idx]; idx = hw_irq % dgc->irqs_per_chip;