| Message ID | 1368070143-1655-6-git-send-email-b32955@freescale.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, May 09, 2013 at 11:29:03AM +0800, Huang Shijie wrote: > Since the SPI/NOR has pin conflict with the WEIM NOR, > we disable the spi/nor by default. > > Signed-off-by: Huang Shijie <b32955@freescale.com> > --- > arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 32 ++++++++++++++++++++++++++++++ > 1 files changed, 32 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi > index 7b561fb..b6b9e56 100644 > --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi > +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi > @@ -16,6 +16,38 @@ > }; > }; > > +&ecspi1 { > + fsl,spi-num-chipselects = <1>; > + cs-gpios = <&gpio3 19 0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ecspi1_1>; > + status = "disabled"; I added a comment to it as below, and applied patch #2~5. status = "disabled"; /* pin conflict with WEIM NOR */ Shawn
On Thu, May 09, 2013 at 11:29:03AM +0800, Huang Shijie wrote: > Since the SPI/NOR has pin conflict with the WEIM NOR, > we disable the spi/nor by default. > > Signed-off-by: Huang Shijie <b32955@freescale.com> > --- > arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 32 ++++++++++++++++++++++++++++++ > 1 files changed, 32 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi > index 7b561fb..b6b9e56 100644 > --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi > +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi > @@ -16,6 +16,38 @@ > }; > }; > > +&ecspi1 { > + fsl,spi-num-chipselects = <1>; > + cs-gpios = <&gpio3 19 0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ecspi1_1>; > + status = "disabled"; > + > + flash: m25p80@0 { > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "st,m25p32"; > + spi-max-frequency = <20000000>; > + reg = <0>; > + > + partition@0 { > + label = "U-Boot"; > + reg = <0x0 0x40000>; > + }; > + > + partition@40000 { > + label = "U-Boot-ENV"; > + reg = <0x40000 0x10000>; > + read-only; > + }; > + > + partition@50000 { > + label = "Kernel"; > + reg = <0x50000 0x3b0000>; > + }; I really object to enforcing partition layouts in the devicetree. That's clearly usecase specific and should be filled by the bootloader. Having no partitions normally is not harmful, but having the wrong layout just because we start a mainline devicetree really can be harmful. Sascha
On Sun, May 12, 2013 at 04:43:39PM +0200, Sascha Hauer wrote: > On Thu, May 09, 2013 at 11:29:03AM +0800, Huang Shijie wrote: > > Since the SPI/NOR has pin conflict with the WEIM NOR, > > we disable the spi/nor by default. > > > > Signed-off-by: Huang Shijie <b32955@freescale.com> > > --- > > arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 32 ++++++++++++++++++++++++++++++ > > 1 files changed, 32 insertions(+), 0 deletions(-) > > > > diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi > > index 7b561fb..b6b9e56 100644 > > --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi > > +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi > > @@ -16,6 +16,38 @@ > > }; > > }; > > > > +&ecspi1 { > > + fsl,spi-num-chipselects = <1>; > > + cs-gpios = <&gpio3 19 0>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_ecspi1_1>; > > + status = "disabled"; > > + > > + flash: m25p80@0 { > > + #address-cells = <1>; > > + #size-cells = <1>; > > + compatible = "st,m25p32"; > > + spi-max-frequency = <20000000>; > > + reg = <0>; > > + > > + partition@0 { > > + label = "U-Boot"; > > + reg = <0x0 0x40000>; > > + }; > > + > > + partition@40000 { > > + label = "U-Boot-ENV"; > > + reg = <0x40000 0x10000>; > > + read-only; > > + }; > > + > > + partition@50000 { > > + label = "Kernel"; > > + reg = <0x50000 0x3b0000>; > > + }; > > I really object to enforcing partition layouts in the devicetree. That's > clearly usecase specific and should be filled by the bootloader. Having > no partitions normally is not harmful, but having the wrong layout just > because we start a mainline devicetree really can be harmful. Ah, yes. I recall the discussion you had with people a couple of weeks ago. I agreed with your opinion. Just fixed it up with partition layouts removed. Shawn
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index 7b561fb..b6b9e56 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -16,6 +16,38 @@ }; }; +&ecspi1 { + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio3 19 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1_1>; + status = "disabled"; + + flash: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p32"; + spi-max-frequency = <20000000>; + reg = <0>; + + partition@0 { + label = "U-Boot"; + reg = <0x0 0x40000>; + }; + + partition@40000 { + label = "U-Boot-ENV"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "Kernel"; + reg = <0x50000 0x3b0000>; + }; + }; +}; + &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet_2>;
Since the SPI/NOR has pin conflict with the WEIM NOR, we disable the spi/nor by default. Signed-off-by: Huang Shijie <b32955@freescale.com> --- arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 32 ++++++++++++++++++++++++++++++ 1 files changed, 32 insertions(+), 0 deletions(-)