From patchwork Fri May 10 17:31:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Soren Brinkmann X-Patchwork-Id: 2551841 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 06CD8DF2A2 for ; Fri, 10 May 2013 17:33:09 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UarBL-000404-Km; Fri, 10 May 2013 17:32:36 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UarBC-0002Um-DK; Fri, 10 May 2013 17:32:26 +0000 Received: from mail-pb0-x22d.google.com ([2607:f8b0:400e:c01::22d]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UarB9-0002TY-02 for linux-arm-kernel@lists.infradead.org; Fri, 10 May 2013 17:32:24 +0000 Received: by mail-pb0-f45.google.com with SMTP id mc8so1028140pbc.18 for ; Fri, 10 May 2013 10:31:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:mime-version:content-type :content-transfer-encoding; bh=d73TSWu1W2t4N43Qi7WU7qSNzN31Y4sFzNy3b18EEts=; b=nIfSxQD4rjOUltlMNHMfBZdDStS+b3jrz1YJyUqL/MCE+3SYpeLMcRaXNHlp+vpvs0 m7AA2k/yy+YN5AZABbMa+LpdGuDJcepILP4YXlz6tLV3MtMHHvTdLbVXbyECmwJj3796 Zmpc9f3zcypN1vGSp8l1dd66jUC2Obzuk8GzxCA2TPGW071FtLUHMwSyBbrehll+Z4Kp 3rvDRNxmJNTUJoZWgTceDBu/mqHiRd+8awW8XkCLYlBQH8rU0BPj4ZxB/J7aKBxPyh7z qr385QmiufBltQ2CLPTWAwnB2/f1Bt2pP4Xb3DtwFrmRcfbogv/5oKDXB5gT2berKf+M gLiw== X-Received: by 10.66.232.69 with SMTP id tm5mr18878563pac.120.1368207119076; Fri, 10 May 2013 10:31:59 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id au5sm3414208pbc.40.2013.05.10.10.31.57 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 10 May 2013 10:31:58 -0700 (PDT) From: Soren Brinkmann To: Mike Turquette Subject: [PATCH RFC] clk: Introduce userspace clock driver Date: Fri, 10 May 2013 10:31:31 -0700 Message-Id: <1368207091-32538-2-git-send-email-soren.brinkmann@xilinx.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: <1368207091-32538-1-git-send-email-soren.brinkmann@xilinx.com> References: <1368207091-32538-1-git-send-email-soren.brinkmann@xilinx.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130510_133223_275061_C4FD94DA X-CRM114-Status: GOOD ( 22.87 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (soeren.brinkmann[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Soren Brinkmann , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The userspace clock driver can be used to expose clock controls through sysfs to userspace. The driver creates entries in /sys/class/clk. Signed-off-by: Soren Brinkmann --- .../devicetree/bindings/clock/clk-userspace.txt | 7 + drivers/clk/Kconfig | 9 ++ drivers/clk/Makefile | 1 + drivers/clk/clk-userspace.c | 169 +++++++++++++++++++++ 4 files changed, 186 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/clk-userspace.txt create mode 100644 drivers/clk/clk-userspace.c diff --git a/Documentation/devicetree/bindings/clock/clk-userspace.txt b/Documentation/devicetree/bindings/clock/clk-userspace.txt new file mode 100644 index 0000000..2d153c7 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/clk-userspace.txt @@ -0,0 +1,7 @@ + +Example: + usclk: usclk { + compatible = "clk-userspace"; + clocks = <&foo 15>, <&bar>; + clock-count = <2>; + }; diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 0357ac4..b35b62c 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -81,6 +81,15 @@ config COMMON_CLK_AXI_CLKGEN Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx FPGAs. It is commonly used in Analog Devices' reference designs. +config COMMON_CLK_USERSPACE + bool "Userspace Clock Controls" + depends on OF + depends on SYSFS + help + ---help--- + Expose clock controls through sysfs to userspace. Clocks are selected + through the device tree and the controls are exposed in + /sys/class/clk. endmenu source "drivers/clk/mvebu/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index fa435bc..f2f68c8 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o obj-$(CONFIG_COMMON_CLK) += clk-gate.o obj-$(CONFIG_COMMON_CLK) += clk-mux.o obj-$(CONFIG_COMMON_CLK) += clk-composite.o +obj-$(CONFIG_COMMON_CLK_USERSPACE) += clk-userspace.o # SoCs specific obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o diff --git a/drivers/clk/clk-userspace.c b/drivers/clk/clk-userspace.c new file mode 100644 index 0000000..931cf92 --- /dev/null +++ b/drivers/clk/clk-userspace.c @@ -0,0 +1,169 @@ +/* + * Userspace clock driver + * + * Copyright (C) 2013 Xilinx + * + * Sören Brinkmann + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License v2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + * Expose clock controls through sysfs to userspace. + * + * By writing 0/1 to 'enable' the clock can be disabled/enabled. Reading + * that file returns the current state - 0 = disabled, 1 = enabled. + * + * Reading 'set_rate' returns the current clock frequency in Hz. Writing + * the file requests setting a new frequency in Hz. + */ + +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "clk-userspace" + +struct usclk_data { + struct clk *clk; + int enabled; +}; + +static ssize_t enable_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct usclk_data *pdata = dev_get_drvdata(dev); + + return scnprintf(buf, PAGE_SIZE, "%u\n", pdata->enabled); +} + +static ssize_t enable_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long enable; + int ret; + struct usclk_data *pdata = dev_get_drvdata(dev); + + ret = kstrtoul(buf, 0, &enable); + if (ret) + return -EINVAL; + + enable = !!enable; + if (enable == pdata->enabled) + return count; + + if (enable) + ret = clk_prepare_enable(pdata->clk); + else + clk_disable_unprepare(pdata->clk); + + if (ret) + return -EBUSY; + + pdata->enabled = enable; + return count; +} + +static DEVICE_ATTR(enable, 0644, enable_show, enable_store); + +static ssize_t set_rate_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct usclk_data *pdata = dev_get_drvdata(dev); + + return scnprintf(buf, PAGE_SIZE, "%lu\n", clk_get_rate(pdata->clk)); +} + +static ssize_t set_rate_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret = 0; + unsigned long rate; + struct usclk_data *pdata = dev_get_drvdata(dev); + + ret = kstrtoul(buf, 0, &rate); + if (ret) + return -EINVAL; + + rate = clk_round_rate(pdata->clk, rate); + ret = clk_set_rate(pdata->clk, rate); + if (ret) + return -EBUSY; + + return count; +} + +static DEVICE_ATTR(set_rate, 0644, set_rate_show, set_rate_store); + +static const struct attribute *usclk_attrs[] = { + &dev_attr_enable.attr, + &dev_attr_set_rate.attr, + NULL +}; + +static const struct attribute_group usclk_attr_grp = { + .attrs = (struct attribute **)usclk_attrs, +}; + +static int usclk_setup(void) +{ + int ret; + int i; + struct usclk_data *pdata; + u32 clock_count; + struct class *clk_class; + struct device *dev; + struct device_node *np = of_find_compatible_node(NULL, NULL, + "clk-userspace"); + + ret = of_property_read_u32(np, "clock-count", &clock_count); + if (ret || !clock_count) + return ret; + + pdata = kzalloc(clock_count * sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + clk_class = class_create(THIS_MODULE, "clk"); + if (!clk_class) { + pr_err("unable to create class\n"); + goto err_free; + } + + for (i = 0; i < clock_count; i++) { + pdata[i].clk = of_clk_get(np, i); + if (IS_ERR(pdata[i].clk)) { + pr_warn("input clock #%u not found\n", i); + continue; + } + + dev = device_create(clk_class, NULL, MKDEV(0, 0), NULL, + of_clk_get_parent_name(np, i)); + if (!dev) { + pr_warn("unable to create device #%d\n", i); + continue; + } + + dev_set_drvdata(dev, &pdata[i]); + sysfs_create_group(&dev->kobj, &usclk_attr_grp); + } + + return 0; + +err_free: + kfree(pdata); + + return ret; +} +late_initcall(usclk_setup);