From patchwork Fri May 17 10:13:41 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 2581901 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 42C7F40079 for ; Fri, 17 May 2013 10:14:24 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UdHg5-0004vw-Hp; Fri, 17 May 2013 10:14:21 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UdHg2-00049F-Hh; Fri, 17 May 2013 10:14:18 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UdHfz-000486-Dj for linux-arm-kernel@lists.infradead.org; Fri, 17 May 2013 10:14:16 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r4HADqgE005941; Fri, 17 May 2013 05:13:52 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r4HADqFW005248; Fri, 17 May 2013 05:13:52 -0500 Received: from dlelxv24.itg.ti.com (172.17.1.199) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Fri, 17 May 2013 05:13:51 -0500 Received: from localhost.localdomain (dbdp20.itg.ti.com [172.24.170.38]) by dlelxv24.itg.ti.com (8.13.8/8.13.8) with ESMTP id r4HADnDq006951; Fri, 17 May 2013 05:13:50 -0500 From: Vaibhav Hiremath To: Subject: [PATCH-V2] ARM: OMAP3+: am33xx id: Add new am33xx specific function to check dev_feature Date: Fri, 17 May 2013 15:43:41 +0530 Message-ID: <1368785621-31591-1-git-send-email-hvaibhav@ti.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130517_061415_536573_B53CF897 X-CRM114-Status: UNSURE ( 9.72 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -7.5 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.152 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.6 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: tony@atomide.com, khilman@linaro.org, Vaibhav Hiremath , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Layout of DEV_FEATURE register (offset = 0x604) is different between TI81xx and AM33xx device, so create separate function which will check for features available on specific AM33xx SoC and set the flags accordingly. Signed-off-by: Vaibhav Hiremath Reviewed-by: Kevin Hilman --- Changes from V1: - Removed SHIFT value, as it never gets used in code - Used BIT() macro for MASK definition arch/arm/mach-omap2/control.h | 4 ++++ arch/arm/mach-omap2/id.c | 13 +++++++++++++ arch/arm/mach-omap2/io.c | 2 +- arch/arm/mach-omap2/soc.h | 1 + 4 files changed, 19 insertions(+), 1 deletions(-) -- 1.7.0.4 diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index e6c3281..174eb41 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -358,6 +358,10 @@ #define AM33XX_CONTROL_STATUS_SYSBOOT1_WIDTH 0x2 #define AM33XX_CONTROL_STATUS_SYSBOOT1_MASK (0x3 << 22) +/* DEV Feature register to identify AM33XX features */ +#define AM33XX_DEV_FEATURE 0x604 +#define AM33XX_SGX_MASK BIT(29) + /* CONTROL OMAP STATUS register to identify OMAP3 features */ #define OMAP3_CONTROL_OMAP_STATUS 0x044c diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 1272c41..44be835 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -302,6 +302,19 @@ void __init ti81xx_check_features(void) omap3_cpuinfo(); } +void __init am33xx_check_features(void) +{ + u32 status; + + omap_features = OMAP3_HAS_NEON; + + status = omap_ctrl_readl(AM33XX_DEV_FEATURE); + if (status & AM33XX_SGX_MASK) + omap_features |= OMAP3_HAS_SGX; + + omap3_cpuinfo(); +} + void __init omap3xxx_check_revision(void) { const char *cpu_rev; diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 09abf99..06a8946 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -576,7 +576,7 @@ void __init am33xx_init_early(void) omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE)); omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL); omap3xxx_check_revision(); - ti81xx_check_features(); + am33xx_check_features(); am33xx_voltagedomains_init(); am33xx_powerdomains_init(); am33xx_clockdomains_init(); diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 197cc16..fd4507b 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -424,6 +424,7 @@ void omap4xxx_check_revision(void); void omap5xxx_check_revision(void); void omap3xxx_check_features(void); void ti81xx_check_features(void); +void am33xx_check_features(void); void omap4xxx_check_features(void); /*