From patchwork Fri May 31 09:19:06 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 2641291 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id E2FE13FD2B for ; Fri, 31 May 2013 09:31:57 +0000 (UTC) Received: from merlin.infradead.org ([205.233.59.134]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UiLfZ-0007oM-Mq; Fri, 31 May 2013 09:30:47 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UiLZi-00048B-Ex; Fri, 31 May 2013 09:24:42 +0000 Received: from eu1sys200aog103.obsmtp.com ([207.126.144.115]) by merlin.infradead.org with smtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UiLWU-0003pK-MS for linux-arm-kernel@lists.infradead.org; Fri, 31 May 2013 09:21:26 +0000 Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob103.postini.com ([207.126.147.11]) with SMTP ID DSNKUahrfjK7ftBmvX8hPRDCZTipopHPnj0U@postini.com; Fri, 31 May 2013 09:21:22 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D072324C; Fri, 31 May 2013 09:21:01 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 54F1F4A39; Fri, 31 May 2013 09:20:44 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 01EB724C07D; Fri, 31 May 2013 11:20:56 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.279.5; Fri, 31 May 2013 11:21:01 +0200 From: Linus Walleij To: Subject: [PATCH 31/39] ARM: u300: add syscon node Date: Fri, 31 May 2013 11:19:06 +0200 Message-ID: <1369991954-17406-32-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 In-Reply-To: <1369991954-17406-1-git-send-email-linus.walleij@stericsson.com> References: <1369991954-17406-1-git-send-email-linus.walleij@stericsson.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130531_052123_136980_822C2089 X-CRM114-Status: GOOD ( 24.05 ) X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [207.126.144.115 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Linus Walleij , Arnd Bergmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Linus Walleij This adds a device tree node for the U300 system controller and remaps this dynamically instead of using hard-coded virtual addresses. The board power set-up code is altered to fetch a reference to the syscon using ampersand <&syscon> notation. This way of passing a pointer to the syscon will also be used by the clocks. Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/arm/ste-u300.txt | 30 +++++++++++++++++++--- arch/arm/boot/dts/ste-u300.dts | 6 +++++ arch/arm/mach-u300/core.c | 22 +++++++++++++--- arch/arm/mach-u300/regulator.c | 21 ++++++++++++--- 4 files changed, 69 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/ste-u300.txt b/Documentation/devicetree/bindings/arm/ste-u300.txt index cd9001a..69b5ab0 100644 --- a/Documentation/devicetree/bindings/arm/ste-u300.txt +++ b/Documentation/devicetree/bindings/arm/ste-u300.txt @@ -8,15 +8,39 @@ Required root node property: compatible="stericsson,u300"; +Required node: syscon +This contains the system controller. +- compatible: must be "stericsson,u300-syscon". +- reg: the base address and size of the system controller. + Boards with the U300 SoC include: S365 "Small Board U365": Required node: s365 +This contains the board-specific information. +- compatible: must be "stericsson,s365". +- vana15-supply: the regulator supplying the 1.5V to drive the + board. +- syscon: a pointer to the syscon node so we can acccess the + syscon registers to set the board as self-powered. Example: -s365 { - compatible = "stericsson,s365"; - vana15-supply = <&ab3100_ldo_d_reg>; +/ { + model = "ST-Ericsson U300"; + compatible = "stericsson,u300"; + #address-cells = <1>; + #size-cells = <1>; + + s365 { + compatible = "stericsson,s365"; + vana15-supply = <&ab3100_ldo_d_reg>; + syscon = <&syscon>; + }; + + syscon: syscon@c0011000 { + compatible = "stericsson,u300-syscon"; + reg = <0xc0011000 0x1000>; + }; }; diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts index b8a8ddb..644befd 100644 --- a/arch/arm/boot/dts/ste-u300.dts +++ b/arch/arm/boot/dts/ste-u300.dts @@ -27,6 +27,12 @@ s365 { compatible = "stericsson,s365"; vana15-supply = <&ab3100_ldo_d_reg>; + syscon = <&syscon>; + }; + + syscon: syscon@c0011000 { + compatible = "stericsson,u300-syscon"; + reg = <0xc0011000 0x1000>; }; timer: timer@c0014000 { diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 1fdaf81..8cfca45 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -48,6 +49,8 @@ #define U300_SYSCON_BCR_EXTRA_BOOT_OPTION_MASK (0x01FC) #define U300_SYSCON_BCR_APP_BOOT_SERV_MASK (0x0003) +static void __iomem *syscon_base; + /* * Static I/O mappings that are needed for booting the U300 platforms. The * only things we need are the areas where we find the timer, syscon and @@ -171,7 +174,7 @@ static void __init u300_init_check_chip(void) const char unknown[] = "UNKNOWN"; /* Read out and print chip ID */ - val = readw(U300_SYSCON_VBASE + U300_SYSCON_CIDR); + val = readw(syscon_base + U300_SYSCON_CIDR); /* This is in funky bigendian order... */ val = (val & 0xFFU) << 8 | (val >> 8); chip = db_chips; @@ -244,10 +247,21 @@ static struct of_dev_auxdata u300_auxdata_lookup[] __initdata = { static void __init u300_init_irq_dt(void) { + struct device_node *syscon; struct clk *clk; + syscon = of_find_node_by_path("/syscon@c0011000"); + if (!syscon) { + pr_crit("could not find syscon node\n"); + return; + } + syscon_base = of_iomap(syscon, 0); + if (!syscon_base) { + pr_crit("could not remap syscon\n"); + return; + } /* initialize clocking early, we want to clock the INTCON */ - u300_clk_init(U300_SYSCON_VBASE); + u300_clk_init(syscon_base); /* Bootstrap EMIF and SEMI clocks */ clk = clk_get_sys("pl172", NULL); @@ -280,9 +294,9 @@ static void __init u300_init_machine_dt(void) u300_auxdata_lookup, NULL); /* Enable SEMI self refresh */ - val = readw(U300_SYSCON_VBASE + U300_SYSCON_SMCR) | + val = readw(syscon_base + U300_SYSCON_SMCR) | U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE; - writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR); + writew(val, syscon_base + U300_SYSCON_SMCR); } static const char * u300_board_compat[] = { diff --git a/arch/arm/mach-u300/regulator.c b/arch/arm/mach-u300/regulator.c index 1cbe88c..273fceb 100644 --- a/arch/arm/mach-u300/regulator.c +++ b/arch/arm/mach-u300/regulator.c @@ -16,8 +16,8 @@ #include #include /* Those are just for writing in syscon */ +#include #include -#include "u300-regs.h" /* Power Management Control 16bit (R/W) */ #define U300_SYSCON_PMCR (0x50) @@ -57,10 +57,25 @@ void u300_pm_poweroff(void) */ static int __init __u300_init_boardpower(struct platform_device *pdev) { + struct device_node *np = pdev->dev.of_node; + struct device_node *syscon_np; + static void __iomem *syscon_base; int err; u32 val; pr_info("U300: setting up board power\n"); + + syscon_np = of_parse_phandle(np, "syscon", 0); + if (!syscon_np) { + pr_crit("U300: no syscon node\n"); + return -ENODEV; + } + syscon_base = of_iomap(syscon_np, 0); + if (!syscon_base) { + pr_crit("U300: could not remap syscon\n"); + return -ENODEV; + } + main_power_15 = regulator_get(&pdev->dev, "vana15"); if (IS_ERR(main_power_15)) { @@ -81,9 +96,9 @@ static int __init __u300_init_boardpower(struct platform_device *pdev) * the rest of the U300 power management is implemented. */ pr_info("U300: disable system controller pull-up\n"); - val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMCR); + val = readw(syscon_base + U300_SYSCON_PMCR); val &= ~U300_SYSCON_PMCR_DCON_ENABLE; - writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMCR); + writew(val, syscon_base + U300_SYSCON_PMCR); /* Register globally exported PM poweroff hook */ pm_power_off = u300_pm_poweroff;