From patchwork Mon Jun 3 09:30:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 2651941 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 9C363DF24C for ; Mon, 3 Jun 2013 10:42:39 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UjRAP-00074a-Fm; Mon, 03 Jun 2013 09:35:12 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UjR8l-0001xk-54; Mon, 03 Jun 2013 09:33:23 +0000 Received: from mail-pa0-x22f.google.com ([2607:f8b0:400e:c03::22f]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UjR8P-0001tH-Vl for linux-arm-kernel@lists.infradead.org; Mon, 03 Jun 2013 09:33:05 +0000 Received: by mail-pa0-f47.google.com with SMTP id kl13so799611pab.6 for ; Mon, 03 Jun 2013 02:32:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=oLRB4kZExeXZPm4fhcrxP0BGoY/b1vzHzbWrCxi/Vg4=; b=jyfRBepESH9DgTjAgAg4qJ6Q7ZpVL3w3CI6ArbUIaXOTbHomuId8GzQH2BvkBkjkzD N4MSfk9HOjjg9iHzGoWgUnG23XS6nZ0JipJEPfSCUWbfG9uwJbfIQM2K6Ir6GD0rpJlm pxkBMdC0j7Nq3mLvKqAUljOSp30D/djcWe7dlyvYyW1X1KPik5+VrWFKACORIJ8qJGj3 /BxOjQub/cUpdKuqvhzEMDdjssr0pa3mzwEEdbwg7VdOVczuqyo9IH7RqSUkcs0rA6vn bGEsYLAYw1ryczowWU2lG5SdiaPDKhpVe4romrgX+5PHaSXLxFq+aUJLzgUiOo+nSrwZ NaHQ== X-Received: by 10.68.106.196 with SMTP id gw4mr22963969pbb.126.1370251960050; Mon, 03 Jun 2013 02:32:40 -0700 (PDT) Received: from localhost.localdomain ([27.115.121.40]) by mx.google.com with ESMTPSA id wi6sm58333510pbc.22.2013.06.03.02.32.34 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 03 Jun 2013 02:32:38 -0700 (PDT) From: Haojian Zhuang To: tglx@linutronix.de, arnd@arndb.de, linux-arm-kernel@lists.infradead.org, chao.xie@marvell.com, john.stultz@linaro.org, mturquette@linaro.org, eric.y.miao@gmail.com Subject: [PATCH v3 10/11] ARM: mmp: avoid to use cpu_is_xxx in timer Date: Mon, 3 Jun 2013 17:30:44 +0800 Message-Id: <1370251845-31373-11-git-send-email-haojian.zhuang@gmail.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1370251845-31373-1-git-send-email-haojian.zhuang@gmail.com> References: <1370251845-31373-1-git-send-email-haojian.zhuang@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130603_053302_271341_587E154A X-CRM114-Status: GOOD ( 22.11 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (haojian.zhuang[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Haojian Zhuang , patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Avoid to use cpu_is_xxx() in timer-mmp driver, since it blocks the multiplatform build. Now add mmp2_mode variable for legacy mode. In DT mode, set the right clock rate in DTS file. Signed-off-by: Haojian Zhuang --- arch/arm/boot/dts/mmp2-brownstone.dts | 4 +++ arch/arm/boot/dts/pxa168-aspenite.dts | 1 + arch/arm/boot/dts/pxa910-dkb.dts | 1 + arch/arm/mach-mmp/common.h | 2 +- arch/arm/mach-mmp/mmp-dt.c | 12 ++++++-- arch/arm/mach-mmp/mmp2-dt.c | 12 ++++++-- arch/arm/mach-mmp/mmp2.c | 2 +- arch/arm/mach-mmp/pxa168.c | 2 +- arch/arm/mach-mmp/pxa910.c | 2 +- drivers/clocksource/timer-mmp.c | 58 +++++++++++++++++++++++++---------- 10 files changed, 69 insertions(+), 27 deletions(-) diff --git a/arch/arm/boot/dts/mmp2-brownstone.dts b/arch/arm/boot/dts/mmp2-brownstone.dts index 7f70a39..29c7dc6 100644 --- a/arch/arm/boot/dts/mmp2-brownstone.dts +++ b/arch/arm/boot/dts/mmp2-brownstone.dts @@ -24,6 +24,10 @@ soc { apb@d4000000 { + timer0: timer@d4014000 { + clock-frequency = <6500000>; + status = "okay"; + }; uart3: uart@d4018000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/pxa168-aspenite.dts b/arch/arm/boot/dts/pxa168-aspenite.dts index 2597e98..9b3d6d9 100644 --- a/arch/arm/boot/dts/pxa168-aspenite.dts +++ b/arch/arm/boot/dts/pxa168-aspenite.dts @@ -25,6 +25,7 @@ soc { apb@d4000000 { timer0: timer@d4014000 { + clock-frequency = <3250000>; status = "okay"; }; uart1: uart@d4017000 { diff --git a/arch/arm/boot/dts/pxa910-dkb.dts b/arch/arm/boot/dts/pxa910-dkb.dts index b892ebe..3cd1a85 100644 --- a/arch/arm/boot/dts/pxa910-dkb.dts +++ b/arch/arm/boot/dts/pxa910-dkb.dts @@ -33,6 +33,7 @@ clock-output-names = "refclk1001mhz"; }; timer0: timer@d4014000 { + clock-frequency = <3250000>; status = "okay"; }; uart1: uart@d4017000 { diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h index 9c1c9be..9f5a72a 100644 --- a/arch/arm/mach-mmp/common.h +++ b/arch/arm/mach-mmp/common.h @@ -1,6 +1,6 @@ #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) -extern void timer_init(int irq); +extern void timer_init(int irq, int mmp2_mode); extern void __init mmp_map_io(void); extern void mmp_restart(char, const char *); diff --git a/arch/arm/mach-mmp/mmp-dt.c b/arch/arm/mach-mmp/mmp-dt.c index 9227b16..2b8f1f6 100644 --- a/arch/arm/mach-mmp/mmp-dt.c +++ b/arch/arm/mach-mmp/mmp-dt.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include @@ -49,7 +50,6 @@ static void __init pxa168_dt_init(void) static void __init pxa910_dt_init(void) { - of_clk_init(NULL); of_platform_populate(NULL, of_default_bus_match_table, pxa910_auxdata_lookup, NULL); } @@ -60,10 +60,16 @@ static const char *mmp_dt_board_compat[] __initdata = { NULL, }; +static void __init mmp_init_timer(void) +{ + of_clk_init(NULL); + mmp_dt_init_timer(); +} + DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)") .map_io = mmp_map_io, .init_irq = irqchip_init, - .init_time = mmp_dt_init_timer, + .init_time = mmp_init_timer, .init_machine = pxa168_dt_init, .dt_compat = mmp_dt_board_compat, MACHINE_END @@ -71,7 +77,7 @@ MACHINE_END DT_MACHINE_START(PXA910_DT, "Marvell PXA910 (Device Tree Support)") .map_io = mmp_map_io, .init_irq = irqchip_init, - .init_time = mmp_dt_init_timer, + .init_time = mmp_init_timer, .init_machine = pxa910_dt_init, .dt_compat = mmp_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-mmp/mmp2-dt.c b/arch/arm/mach-mmp/mmp2-dt.c index d12231d..68a7642 100644 --- a/arch/arm/mach-mmp/mmp2-dt.c +++ b/arch/arm/mach-mmp/mmp2-dt.c @@ -9,6 +9,8 @@ * publishhed by the Free Software Foundation. */ +#include +#include #include #include #include @@ -17,8 +19,6 @@ #include "common.h" -extern void __init mmp_dt_init_timer(void); - static const struct of_dev_auxdata mmp2_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4030000, "pxa2xx-uart.0", NULL), OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.1", NULL), @@ -37,6 +37,12 @@ static void __init mmp2_dt_init(void) mmp2_auxdata_lookup, NULL); } +static void __init mmp2_init_timer(void) +{ + of_clk_init(NULL); + mmp_dt_init_timer(); +} + static const char *mmp2_dt_board_compat[] __initdata = { "mrvl,mmp2-brownstone", NULL, @@ -45,7 +51,7 @@ static const char *mmp2_dt_board_compat[] __initdata = { DT_MACHINE_START(MMP2_DT, "Marvell MMP2 (Device Tree Support)") .map_io = mmp_map_io, .init_irq = irqchip_init, - .init_time = mmp_dt_init_timer, + .init_time = mmp2_init_timer, .init_machine = mmp2_dt_init, .dt_compat = mmp2_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c index c0cdb62..9d90d2f 100644 --- a/arch/arm/mach-mmp/mmp2.c +++ b/arch/arm/mach-mmp/mmp2.c @@ -131,7 +131,7 @@ void __init mmp2_timer_init(void) clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); __raw_writel(clk_rst, APBC_TIMERS); - timer_init(IRQ_MMP2_TIMER1); + timer_init(IRQ_MMP2_TIMER1, 1); } /* on-chip devices */ diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index 87e1bcb..c62970d 100644 --- a/arch/arm/mach-mmp/pxa168.c +++ b/arch/arm/mach-mmp/pxa168.c @@ -78,7 +78,7 @@ void __init pxa168_timer_init(void) /* 3.25MHz, bus/functional clock enabled, release reset */ __raw_writel(TIMER_CLK_RST, APBC_TIMERS); - timer_init(IRQ_PXA168_TIMER1); + timer_init(IRQ_PXA168_TIMER1, 0); } void pxa168_clear_keypad_wakeup(void) diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c index da5c299..8f68c29 100644 --- a/arch/arm/mach-mmp/pxa910.c +++ b/arch/arm/mach-mmp/pxa910.c @@ -112,7 +112,7 @@ void __init pxa910_timer_init(void) __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); __raw_writel(TIMER_CLK_RST, APBC_TIMERS); - timer_init(IRQ_PXA910_AP1_TIMER1); + timer_init(IRQ_PXA910_AP1_TIMER1, 0); } /* on-chip devices */ diff --git a/drivers/clocksource/timer-mmp.c b/drivers/clocksource/timer-mmp.c index 75cc961..39b8968 100644 --- a/drivers/clocksource/timer-mmp.c +++ b/drivers/clocksource/timer-mmp.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -30,8 +31,6 @@ #include #include -#include -#include #include #define TMR_CCR (0x0000) @@ -182,16 +181,19 @@ static struct clocksource cksrc = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; -static void __init timer_config(void) +static void __init timer_init_clk(int mmp2_mode) { uint32_t ccr = __raw_readl(mmp_timer_base + TMR_CCR); __raw_writel(0x0, mmp_timer_base + TMR_CER); /* disable */ - ccr &= (cpu_is_mmp2()) ? (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) : + ccr &= mmp2_mode ? (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) : (TMR_CCR_CS_0(3) | TMR_CCR_CS_1(3)); __raw_writel(ccr, mmp_timer_base + TMR_CCR); +} +static void __init timer_config(void) +{ /* set timer 0 to periodic mode, and timer 1 to free-running mode */ __raw_writel(0x2, mmp_timer_base + TMR_CMR); @@ -214,11 +216,12 @@ static struct irqaction timer_irq = { .dev_id = &ckevt, }; -void __init timer_init(int irq) +void __init timer_init(int irq, int mmp2_mode) { mmp_timer_base = ioremap(TIMERS_PHY_BASE, PAGE_SIZE); BUG_ON(!mmp_timer_base); + timer_init_clk(mmp2_mode); timer_config(); setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE); @@ -241,27 +244,48 @@ static struct of_device_id mmp_timer_dt_ids[] = { void __init mmp_dt_init_timer(void) { struct device_node *np; + struct clk *clk; int irq, ret; + u32 rate = 0; np = of_find_matching_node(NULL, mmp_timer_dt_ids); - if (!np) { - ret = -ENODEV; - goto out; + if (!np) + return; + if (!of_device_is_available(np)) + return; + if (of_property_read_u32(np, "clock-frequency", &rate)) { + pr_err("failed to find clock-frequency property\n"); + return; } - irq = irq_of_parse_and_map(np, 0); - if (!irq) { - ret = -EINVAL; - goto out; + if (!irq) + return; + clk = of_clk_get(np, 0); + if (IS_ERR(clk)) { + pr_err("failed to get timer clock\n"); + return; } mmp_timer_base = of_iomap(np, 0); - if (!mmp_timer_base) { - ret = -ENOMEM; + if (!mmp_timer_base) goto out; - } - timer_init(irq); + + __raw_writel(0x0, mmp_timer_base + TMR_CER); /* disable */ + if (rate) + clk_set_rate(clk, rate); + clk_prepare_enable(clk); + timer_config(); + + setup_sched_clock(mmp_read_sched_clock, 32, rate); + + ckevt.cpumask = cpumask_of(0); + + setup_irq(irq, &timer_irq); + + clocksource_register_hz(&cksrc, rate); + clockevents_config_and_register(&ckevt, rate, + MIN_DELTA, MAX_DELTA); return; out: - pr_err("Failed to get timer from device tree with error:%d\n", ret); + clk_put(clk); } #endif