From patchwork Wed Jun 5 05:59:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 2665021 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 3ADE5DF264 for ; Wed, 5 Jun 2013 06:05:14 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uk6ny-0000SO-12; Wed, 05 Jun 2013 06:02:44 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uk6nL-00064H-GE; Wed, 05 Jun 2013 06:02:03 +0000 Received: from smtp4.mail.ru ([94.100.176.44]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uk6mF-0005tz-El for linux-arm-kernel@lists.infradead.org; Wed, 05 Jun 2013 06:01:02 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=mF15vU1glhKW+lrGOVijPv+/KB6vUAsJx7nlHkNQkiA=; b=tvdZu98jKJk1vhCKWfOAygyv8navk2dXi1yXOqKZhwYLk7X4xryeHNhkrkO/NJtlTEn2hwXhUPdC8FKmnhUjpY9vJXPtdvFGNRwGK+3UvE4mq+eBV9UYYYZtKlZPWI64C7k8rBQ/VrEq9Ba+th1NWRQt3Wc8XP18ZbjCKtGJXcI=; Received: from [188.134.40.128] (port=27813 helo=shc.zet) by smtp4.mail.ru with esmtpa (envelope-from ) id 1Uk6lu-0007yf-MU; Wed, 05 Jun 2013 10:00:34 +0400 From: Alexander Shiyan To: linux-arm-kernel@lists.infradead.org Subject: [PATCH RESEND 06/15] ARM: clps711x: autcpu12: Move remaining specific definitions to board file Date: Wed, 5 Jun 2013 09:59:14 +0400 Message-Id: <1370411967-29451-7-git-send-email-shc_work@mail.ru> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1370411967-29451-1-git-send-email-shc_work@mail.ru> References: <1370411967-29451-1-git-send-email-shc_work@mail.ru> X-Spam: Not detected X-Mras: Ok X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130605_020056_258799_23082AE7 X-CRM114-Status: GOOD ( 15.53 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [94.100.176.44 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (shc_work[at]mail.ru) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Olof Johansson , Russell King , Alexander Shiyan , Arnd Bergmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Signed-off-by: Alexander Shiyan --- arch/arm/mach-clps711x/board-autcpu12.c | 9 +++++- arch/arm/mach-clps711x/include/mach/autcpu12.h | 44 -------------------------- 2 files changed, 8 insertions(+), 45 deletions(-) delete mode 100644 arch/arm/mach-clps711x/include/mach/autcpu12.h diff --git a/arch/arm/mach-clps711x/board-autcpu12.c b/arch/arm/mach-clps711x/board-autcpu12.c index 91a3ab5..cd50314 100644 --- a/arch/arm/mach-clps711x/board-autcpu12.c +++ b/arch/arm/mach-clps711x/board-autcpu12.c @@ -42,7 +42,6 @@ #include #include -#include #include "common.h" #include "devices.h" @@ -50,6 +49,14 @@ /* NOR flash */ #define AUTCPU12_FLASH_BASE (CS0_PHYS_BASE) +/* Board specific hardware definitions */ +#define AUTCPU12_CHAR_LCD_BASE (CS1_PHYS_BASE + 0x00000000) +#define AUTCPU12_CSAUX1_BASE (CS1_PHYS_BASE + 0x04000000) +#define AUTCPU12_CAN_BASE (CS1_PHYS_BASE + 0x08000000) +#define AUTCPU12_TOUCH_BASE (CS1_PHYS_BASE + 0x0a000000) +#define AUTCPU12_IO_BASE (CS1_PHYS_BASE + 0x0c000000) +#define AUTCPU12_LPT_BASE (CS1_PHYS_BASE + 0x0e000000) + /* NVRAM */ #define AUTCPU12_NVRAM_BASE (CS1_PHYS_BASE + 0x02000000) diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h deleted file mode 100644 index 0e00148..0000000 --- a/arch/arm/mach-clps711x/include/mach/autcpu12.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * AUTCPU12 specific defines - * - * (c) 2001 Thomas Gleixner, autronix automation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_AUTCPU12_H -#define __ASM_ARCH_AUTCPU12_H - -/* offset for device specific information structure */ -#define AUTCPU12_LCDINFO_OFFS (0x00010000) - -/* Videomemory in the internal SRAM (CS 6) */ -#define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE - -/* -* All special IO's are tied to CS1 -*/ -#define AUTCPU12_PHYS_CHAR_LCD CS1_PHYS_BASE +0x00000000 /* physical */ - -#define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */ - -#define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */ - -#define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */ - -#define AUTCPU12_PHYS_IO CS1_PHYS_BASE +0x0C000000 /* physical */ - -#define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */ - -#endif