From patchwork Tue Jun 18 06:29:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 2739591 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A812BC0AB1 for ; Tue, 18 Jun 2013 06:50:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E99792028D for ; Tue, 18 Jun 2013 06:50:42 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4677620284 for ; Tue, 18 Jun 2013 06:50:41 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UopTL-0003zw-Ll; Tue, 18 Jun 2013 06:32:59 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UopS7-0005ii-EX; Tue, 18 Jun 2013 06:31:39 +0000 Received: from mail-pd0-f173.google.com ([209.85.192.173]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UopR8-0005bl-II for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2013 06:30:39 +0000 Received: by mail-pd0-f173.google.com with SMTP id v14so3585716pde.4 for ; Mon, 17 Jun 2013 23:30:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=m55OpEeLw//or5BKheQglWKmsxb3tKRlGFrFLFSInOI=; b=mTC1ppqp59jum1Ig+16h3oj0CoPm0OCgBRAyImdcVo/3w1rEHqMYtRSdaEOJShAZxb UiviYEWYPTq/GLNx8Lh225l7+uW+LWL/xvgsDPl94WBO1kqwfB0R9jmNB6iy66Kd2Pg0 mHkXt/Xtw5q1ISahKVpqBbLWZs2hterB1NqcCUHAEGhNI6jup0jCoAGs0GEGUOg0RPy7 hQ7zrr9bSeFj6+56ooT8uy0vUBcYvxoPbJA/Ce1KBAA5OO/0FFkXQ2DgQ7xPS0IGOMWV 7iTXsK8RRY0BT/8pObkzHsAOFuGwKI8v4iPutnwr4ruza01hSJARAwjBdymXH5gUH0XV mTzQ== X-Received: by 10.66.231.7 with SMTP id tc7mr804565pac.143.1371537017150; Mon, 17 Jun 2013 23:30:17 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id ep3sm7967227pbd.27.2013.06.17.23.30.13 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 17 Jun 2013 23:30:16 -0700 (PDT) From: Chander Kashyap To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 09/10] ARM: Exynos: add secondary CPU boot base location for Exynos5420 Date: Tue, 18 Jun 2013 11:59:21 +0530 Message-Id: <1371536962-13322-10-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1371536962-13322-1-git-send-email-chander.kashyap@linaro.org> References: <1371536962-13322-1-git-send-email-chander.kashyap@linaro.org> X-Gm-Message-State: ALoCoQk95f6QjX0p3vaw50W+7QRpSFVNzuEwSXjiOd+sA8Po1CLTWsXMyZfQ8oRFKPm6t62MVQl9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130618_023038_719202_00C1503E X-CRM114-Status: GOOD ( 10.09 ) X-Spam-Score: -1.9 (-) Cc: mark.rutland@arm.com, kgene.kim@samsung.com, linux-serial@vger.kernel.org, t.figa@samsung.com, Chander Kashyap , linux-samsung-soc@vger.kernel.org, thomas.ab@samsung.com, s.nawrocki@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The location at which the boot address is specified for secondary CPUs of Exynos5420 is SYSRAM base + 4. Update the cpu_boot_reg function accordingly. Signed-off-by: Chander Kashyap Reviewed-by: Tomasz Figa --- arch/arm/mach-exynos/platsmp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 85ea4ca..7b4c03e 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -50,6 +50,8 @@ static inline void __iomem *cpu_boot_reg(int cpu) boot_reg = cpu_boot_reg_base(); if (soc_is_exynos4412()) boot_reg += 4*cpu; + else if (soc_is_exynos5420()) + boot_reg += 4; return boot_reg; }