From patchwork Tue Jun 18 06:29:13 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 2739011 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4BE4D9F472 for ; Tue, 18 Jun 2013 06:31:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1D80B20250 for ; Tue, 18 Jun 2013 06:31:12 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AA90420201 for ; Tue, 18 Jun 2013 06:31:10 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UopQz-0003KF-T9; Tue, 18 Jun 2013 06:30:30 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UopQp-0005c0-Fh; Tue, 18 Jun 2013 06:30:19 +0000 Received: from mail-pa0-x233.google.com ([2607:f8b0:400e:c03::233]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UopQa-0005ZE-J7 for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2013 06:30:08 +0000 Received: by mail-pa0-f51.google.com with SMTP id lf11so3642127pab.10 for ; Mon, 17 Jun 2013 23:29:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=+oGh0xxfb+c9d8U7ajH+DJpg4uL9HpOF+ZqXN62HKGQ=; b=dxMvhzY4aT01CbzZQWiU9ohR62vJ7X0C3zXKBY9LjonN399rvOzDWxU2AtsKBqAuf1 OWB9Q3dPKAo7vEr0D5VunDUmDUr2HH479Ny9RqaGxMABr7c1sbiRM2koT97SK4NuI//m 2T2sz5X/SUIc5Czl21Ey8IUpgJ8UWtdm/vJAli2U2r286XSraZ87wbezmV1lFHoEc6aa 8g7AOOXxV2bI9NCjbi+Z64KfhIzUrckEVw01TWwW99zyH5nilReYw7hmNBLO6pB0MDeV SPpHw6m8d4DZNexo/EdZuVF8/WdKM9BzSpaEijyPljVJswF39nvePjKDct4ne4pwF55r nDaw== X-Received: by 10.66.26.231 with SMTP id o7mr761393pag.207.1371536983195; Mon, 17 Jun 2013 23:29:43 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id ep3sm7967227pbd.27.2013.06.17.23.29.38 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 17 Jun 2013 23:29:42 -0700 (PDT) From: Chander Kashyap To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 01/10] ARM: dts: fork out common Exynos5 nodes Date: Tue, 18 Jun 2013 11:59:13 +0530 Message-Id: <1371536962-13322-2-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1371536962-13322-1-git-send-email-chander.kashyap@linaro.org> References: <1371536962-13322-1-git-send-email-chander.kashyap@linaro.org> X-Gm-Message-State: ALoCoQn1lXWunVJbbBRTTAwz2hi0Ey3h5RLMfrpx4wX9o2p7uuwmaKPTDY+PzCvVpFFIZnYa2oDk X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130618_023004_861800_A759505D X-CRM114-Status: GOOD ( 16.00 ) X-Spam-Score: -1.9 (-) Cc: mark.rutland@arm.com, kgene.kim@samsung.com, linux-serial@vger.kernel.org, t.figa@samsung.com, Chander Kashyap , linux-samsung-soc@vger.kernel.org, thomas.ab@samsung.com, s.nawrocki@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In preparation of adding support for Exynos5420, which has many peripherals similar to Exynos5250, a new common Exynos5 device tree source file is created out of the exising Exynos5250 device tree source file. Only the common nodes required for basic boot up on Exynos5420 based boards are moved into this new file and the rest of the common nodes would be moved subsequently. Exynos5440 SoC is quite different from Exynos5250 and Exynos5420 SoCs. Hence it is not possible to reuse "exynos5.dtsi" for Exynos5440. Signed-off-by: Chander Kashyap Reviewed-by: Tomasz Figa --- arch/arm/boot/dts/exynos5.dtsi | 111 +++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos5250.dtsi | 66 +--------------------- 2 files changed, 112 insertions(+), 65 deletions(-) create mode 100644 arch/arm/boot/dts/exynos5.dtsi diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi new file mode 100644 index 0000000..f65e124 --- /dev/null +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -0,0 +1,111 @@ +/* + * Samsung's Exynos5 SoC series common device tree source + * + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular + * SoCs from Exynos5 series can include this file and provide values for SoCs + * specfic bindings. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "skeleton.dtsi" + +/ { + interrupt-parent = <&gic>; + + chipid@10000000 { + compatible = "samsung,exynos4210-chipid"; + reg = <0x10000000 0x100>; + }; + + combiner:interrupt-controller@10440000 { + compatible = "samsung,exynos4210-combiner"; + #interrupt-cells = <2>; + interrupt-controller; + samsung,combiner-nr = <32>; + reg = <0x10440000 0x1000>; + interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, + <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, + <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, + <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, + <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, + <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, + <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, + <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; + }; + + gic:interrupt-controller@10481000 { + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x10481000 0x1000>, + <0x10482000 0x1000>, + <0x10484000 0x2000>, + <0x10486000 0x2000>; + interrupts = <1 9 0xf04>; + }; + + dwmmc_0: dwmmc0@12200000 { + compatible = "samsung,exynos5250-dw-mshc"; + interrupts = <0 75 0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + dwmmc_1: dwmmc1@12210000 { + compatible = "samsung,exynos5250-dw-mshc"; + interrupts = <0 76 0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + dwmmc_2: dwmmc2@12220000 { + compatible = "samsung,exynos5250-dw-mshc"; + interrupts = <0 77 0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + serial@12C00000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C00000 0x100>; + interrupts = <0 51 0>; + }; + + serial@12C10000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C10000 0x100>; + interrupts = <0 52 0>; + }; + + serial@12C20000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C20000 0x100>; + interrupts = <0 53 0>; + }; + + serial@12C30000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C30000 0x100>; + interrupts = <0 54 0>; + }; + + rtc { + compatible = "samsung,s3c6410-rtc"; + reg = <0x101E0000 0x100>; + interrupts = <0 43 0>, <0 44 0>; + status = "disabled"; + }; + + watchdog { + compatible = "samsung,s3c2410-wdt"; + reg = <0x101D0000 0x100>; + interrupts = <0 42 0>; + status = "disabled"; + }; +}; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 0673524..63ca03d 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -17,12 +17,11 @@ * published by the Free Software Foundation. */ -/include/ "skeleton.dtsi" +#include "exynos5.dtsi" /include/ "exynos5250-pinctrl.dtsi" / { compatible = "samsung,exynos5250"; - interrupt-parent = <&gic>; aliases { spi0 = &spi_0; @@ -51,11 +50,6 @@ pinctrl3 = &pinctrl_3; }; - chipid@10000000 { - compatible = "samsung,exynos4210-chipid"; - reg = <0x10000000 0x100>; - }; - pd_gsc: gsc-power-domain@0x10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>; @@ -72,17 +66,6 @@ #clock-cells = <1>; }; - gic:interrupt-controller@10481000 { - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x10481000 0x1000>, - <0x10482000 0x1000>, - <0x10484000 0x2000>, - <0x10486000 0x2000>; - interrupts = <1 9 0xf04>; - }; - timer { compatible = "arm,armv7-timer"; interrupts = <1 13 0xf08>, @@ -91,22 +74,6 @@ <1 10 0xf08>; }; - combiner:interrupt-controller@10440000 { - compatible = "samsung,exynos4210-combiner"; - #interrupt-cells = <2>; - interrupt-controller; - samsung,combiner-nr = <32>; - reg = <0x10440000 0x1000>; - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, - <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, - <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, - <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; - }; - mct@101C0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; @@ -168,9 +135,6 @@ }; watchdog { - compatible = "samsung,s3c2410-wdt"; - reg = <0x101D0000 0x100>; - interrupts = <0 42 0>; clocks = <&clock 336>; clock-names = "watchdog"; }; @@ -183,12 +147,8 @@ }; rtc { - compatible = "samsung,s3c6410-rtc"; - reg = <0x101E0000 0x100>; - interrupts = <0 43 0>, <0 44 0>; clocks = <&clock 337>; clock-names = "rtc"; - status = "disabled"; }; tmu@10060000 { @@ -200,33 +160,21 @@ }; serial@12C00000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x12C00000 0x100>; - interrupts = <0 51 0>; clocks = <&clock 289>, <&clock 146>; clock-names = "uart", "clk_uart_baud0"; }; serial@12C10000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x12C10000 0x100>; - interrupts = <0 52 0>; clocks = <&clock 290>, <&clock 147>; clock-names = "uart", "clk_uart_baud0"; }; serial@12C20000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x12C20000 0x100>; - interrupts = <0 53 0>; clocks = <&clock 291>, <&clock 148>; clock-names = "uart", "clk_uart_baud0"; }; serial@12C30000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x12C30000 0x100>; - interrupts = <0 54 0>; clocks = <&clock 292>, <&clock 149>; clock-names = "uart", "clk_uart_baud0"; }; @@ -405,31 +353,19 @@ }; dwmmc_0: dwmmc0@12200000 { - compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12200000 0x1000>; - interrupts = <0 75 0>; - #address-cells = <1>; - #size-cells = <0>; clocks = <&clock 280>, <&clock 139>; clock-names = "biu", "ciu"; }; dwmmc_1: dwmmc1@12210000 { - compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12210000 0x1000>; - interrupts = <0 76 0>; - #address-cells = <1>; - #size-cells = <0>; clocks = <&clock 281>, <&clock 140>; clock-names = "biu", "ciu"; }; dwmmc_2: dwmmc2@12220000 { - compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12220000 0x1000>; - interrupts = <0 77 0>; - #address-cells = <1>; - #size-cells = <0>; clocks = <&clock 282>, <&clock 141>; clock-names = "biu", "ciu"; };