From patchwork Tue Jun 18 06:29:19 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 2739061 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 167069F472 for ; Tue, 18 Jun 2013 06:35:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CCC972025D for ; Tue, 18 Jun 2013 06:35:16 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2ED43201B7 for ; Tue, 18 Jun 2013 06:35:15 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UopSU-0003iV-Qt; Tue, 18 Jun 2013 06:32:04 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UopRh-0005gh-Rc; Tue, 18 Jun 2013 06:31:13 +0000 Received: from mail-pd0-f180.google.com ([209.85.192.180]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UopR0-0005ar-GE for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2013 06:30:33 +0000 Received: by mail-pd0-f180.google.com with SMTP id 10so3576167pdi.11 for ; Mon, 17 Jun 2013 23:30:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=VgZa/VCg87sCrjlFfsNn6ExdD4TsIyvPPPDkhpBqOfo=; b=jrWyUXUPO+1NLc89YmsGLQx6xbki2TEhyVSXQo8RyAQwJGs7Hb4kRuJz2lP647wO5M gQ09aMFrZXHgQMCa6waYOaYHJgF64kfLuy2fkSJGfbDGkS716V/1mx5RTTr3ZKlww15q SPAJaKmVlI7QrAMepiNJlu6w4mUSMFJxPOKEDnD5LC5EJy/zBSQehAaGR0h6ci/X2lMs 6NCewV4jd/uj3HcF2Sd5oVnABuAKopUDHxmoEGvilY8Q781G6s1B/eQs+hVeTCHmVkxp 3ZA2CXe7A5qZZfcvpmM8bph599rIgYhk8aoRW36zZvWQZayAUswx+2Gt3uXdPOyuBLVF xp9w== X-Received: by 10.68.170.193 with SMTP id ao1mr15934854pbc.18.1371537009049; Mon, 17 Jun 2013 23:30:09 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id ep3sm7967227pbd.27.2013.06.17.23.30.05 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 17 Jun 2013 23:30:08 -0700 (PDT) From: Chander Kashyap To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 07/10] ARM: dts: Add initial device tree support for Exynos5420 Date: Tue, 18 Jun 2013 11:59:19 +0530 Message-Id: <1371536962-13322-8-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1371536962-13322-1-git-send-email-chander.kashyap@linaro.org> References: <1371536962-13322-1-git-send-email-chander.kashyap@linaro.org> X-Gm-Message-State: ALoCoQnKrKmTTxGDy4q9SMAoBq/ewwQiulb2LEpYh3SmIsEo2ieu9Mpuk0bdUESxMj6Hcew9HZ5+ X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130618_023030_708182_89631789 X-CRM114-Status: GOOD ( 13.11 ) X-Spam-Score: -1.9 (-) Cc: mark.rutland@arm.com, kgene.kim@samsung.com, linux-serial@vger.kernel.org, t.figa@samsung.com, Chander Kashyap , linux-samsung-soc@vger.kernel.org, thomas.ab@samsung.com, s.nawrocki@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add initial device tree nodes for Exynos5420 SoC and SMDK5420 board. Signed-off-by: Chander Kashyap --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/exynos5420-smdk5420.dts | 33 +++++++++ arch/arm/boot/dts/exynos5420.dtsi | 103 +++++++++++++++++++++++++++++ 3 files changed, 137 insertions(+) create mode 100644 arch/arm/boot/dts/exynos5420-smdk5420.dts create mode 100644 arch/arm/boot/dts/exynos5420.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f0895c5..5efa7e0 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -57,6 +57,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos5440-sd5v1.dtb \ exynos5250-smdk5250.dtb \ exynos5250-snow.dtb \ + exynos5420-smdk5420.dtb \ exynos5440-ssdk5440.dtb dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ ecx-2000.dtb diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts new file mode 100644 index 0000000..08607df --- /dev/null +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -0,0 +1,33 @@ +/* + * SAMSUNG SMDK5420 board device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos5420.dtsi" + +/ { + model = "Samsung SMDK5420 board based on EXYNOS5420"; + compatible = "samsung,smdk5420", "samsung,exynos5420"; + + memory { + reg = <0x20000000 0x80000000>; + }; + + chosen { + bootargs = "console=ttySAC2,115200 init=/linuxrc"; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi new file mode 100644 index 0000000..8474d63 --- /dev/null +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -0,0 +1,103 @@ +/* + * SAMSUNG EXYNOS5420 SoC device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * SAMSUNG EXYNOS54200 SoC device nodes are listed in this file. + * EXYNOS5420 based board files can include this file and provide + * values for board specfic bindings. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "exynos5.dtsi" +/ { + compatible = "samsung,exynos5420"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + clock-frequency = <1800000000>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x1>; + clock-frequency = <1800000000>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x2>; + clock-frequency = <1800000000>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x3>; + clock-frequency = <1800000000>; + }; + }; + + clock: clock-controller@0x10010000 { + compatible = "samsung,exynos5420-clock"; + reg = <0x10010000 0x30000>; + #clock-cells = <1>; + }; + + mct@101C0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + interrupt-controller; + #interrups-cells = <1>; + interrupt-parent = <&mct_map>; + interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>; + clocks = <&clock 1>, <&clock 315>; + clock-names = "fin_pll", "mct"; + + mct_map: mct-map { + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0 &combiner 23 3>, + <1 &combiner 23 4>, + <2 &combiner 25 2>, + <3 &combiner 25 3>, + <4 &gic 0 120 0>, + <5 &gic 0 121 0>, + <6 &gic 0 122 0>, + <7 &gic 0 123 0>; + }; + }; + + serial@12C00000 { + clocks = <&clock 257>, <&clock 128>; + clock-names = "uart", "clk_uart_baud0"; + }; + + serial@12C10000 { + clocks = <&clock 258>, <&clock 129>; + clock-names = "uart", "clk_uart_baud0"; + }; + + serial@12C20000 { + clocks = <&clock 259>, <&clock 130>; + clock-names = "uart", "clk_uart_baud0"; + }; + + serial@12C30000 { + clocks = <&clock 260>, <&clock 131>; + clock-names = "uart", "clk_uart_baud0"; + }; +};