From patchwork Wed Jun 19 12:36:38 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 2749011 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CB7EFC0AB1 for ; Wed, 19 Jun 2013 12:38:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AF37720265 for ; Wed, 19 Jun 2013 12:38:22 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7E5D820264 for ; Wed, 19 Jun 2013 12:38:21 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UpHds-0004CQ-LO; Wed, 19 Jun 2013 12:37:41 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UpHde-0001jr-Pk; Wed, 19 Jun 2013 12:37:26 +0000 Received: from ducie-dc1.codethink.co.uk ([37.128.190.40]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UpHdT-0001fs-ED for linux-arm-kernel@lists.infradead.org; Wed, 19 Jun 2013 12:37:16 +0000 Received: by ducie-dc1.codethink.co.uk (Postfix, from userid 1002) id DECA5465151; Wed, 19 Jun 2013 13:36:55 +0100 (BST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from rainbowdash.ducie.codethink.co.uk (rainbowdash.dyn.ducie.codethink.co.uk [192.168.24.134]) by ducie-dc1.codethink.co.uk (Postfix) with ESMTPS id 3C5A64638C2; Wed, 19 Jun 2013 13:36:51 +0100 (BST) Received: from ben by rainbowdash.ducie.codethink.co.uk with local (Exim 4.80) (envelope-from ) id 1UpHd2-0004PG-F9; Wed, 19 Jun 2013 13:36:48 +0100 From: Ben Dooks To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 02/10] ARM: fixup_pv_table bug when CPU_ENDIAN_BE8 Date: Wed, 19 Jun 2013 13:36:38 +0100 Message-Id: <1371645406-16873-3-git-send-email-ben.dooks@codethink.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1371645406-16873-1-git-send-email-ben.dooks@codethink.co.uk> References: <1371645406-16873-1-git-send-email-ben.dooks@codethink.co.uk> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130619_083715_648991_4C8015E8 X-CRM114-Status: GOOD ( 12.78 ) X-Spam-Score: -3.2 (---) Cc: Ben Dooks X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The fixup_pv_table assumes that the instructions are in the same endian configuration as the data, but when the CPU is running in BE8 the instructions stay in little-endian format. Make sure if CONFIG_CPU_ENDIAN_BE8 is set that we do all the alterations to the instructions taking in to account the LDR/STR will be swapping the data endian-ness. Since the code is only modifying a byte, we avoid dual-swapping the data, and just change the bits we clear and ORR in. Note, not tested against an actual bug, it looked wrong. Signed-off-by: Ben Dooks --- arch/arm/kernel/head.S | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 8bac553..56ddd47 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -594,8 +594,14 @@ __fixup_a_pv_table: #else b 2f 1: ldr ip, [r7, r3] +#ifdef CONFIG_CPU_ENDIAN_BE8 + @ in BE8, we load data in BE, but instructions still in LE + bic ip, ip, #0xff000000 + orr ip, ip, r6, lsl#24 +#else bic ip, ip, #0x000000ff orr ip, ip, r6 @ mask in offset bits 31-24 +#endif str ip, [r7, r3] 2: cmp r4, r5 ldrcc r7, [r4], #4 @ use branch for delay slot