From patchwork Fri Jun 21 21:25:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 2764551 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C4AEE9F39E for ; Fri, 21 Jun 2013 21:27:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C6330201E5 for ; Fri, 21 Jun 2013 21:27:29 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B38A5201BC for ; Fri, 21 Jun 2013 21:27:28 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uq8rA-0000ZH-CG; Fri, 21 Jun 2013 21:26:56 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uq8qy-00061R-JB; Fri, 21 Jun 2013 21:26:44 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uq8qh-0005xb-DJ for linux-arm-kernel@lists.infradead.org; Fri, 21 Jun 2013 21:26:28 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r5LLQ4rF015677; Fri, 21 Jun 2013 16:26:04 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r5LLQ34j008425; Fri, 21 Jun 2013 16:26:03 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Fri, 21 Jun 2013 16:26:03 -0500 Received: from localhost (kahuna.am.dhcp.ti.com [128.247.91.59]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r5LLQ39I015816; Fri, 21 Jun 2013 16:26:03 -0500 From: Nishanth Menon To: =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Mark Brown , Tony Lindgren Subject: [RFC PATCH V2 5/8] ARM: dts: OMAP4: add voltage processor nodes Date: Fri, 21 Jun 2013 16:25:46 -0500 Message-ID: <1371849949-12649-6-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1371849949-12649-1-git-send-email-nm@ti.com> References: <1371849949-12649-1-git-send-email-nm@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130621_172627_550509_FEFE6781 X-CRM114-Status: UNSURE ( 8.40 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -8.4 (--------) Cc: Nishanth Menon , linux-doc@vger.kernel.org, Kevin Hilman , devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP OMAP443x, OMAP446x SoC use same offsets for voltage processor, however their voltage characteristics differ a little. Introduce the voltage processor nodes for the same. Signed-off-by: Nishanth Menon --- arch/arm/boot/dts/omap4.dtsi | 43 +++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/omap443x.dtsi | 15 ++++++++++++++ arch/arm/boot/dts/omap4460.dtsi | 15 ++++++++++++++ 3 files changed, 73 insertions(+) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index a153e8d..3c75b23 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -689,5 +689,48 @@ compatible = "ti,omap4-vc-channel-core"; }; }; + + vp_mpu: vp@0x4A307B58 { + compatible = "ti,omap4-vp"; + + reg = <0x4A307b58 0x18>, <0x4A306014 0x4>; + reg-names = "base-address", "int-address"; + ti,tranxdone-status-mask=<0x20>; + + clocks = <&sysclk_in>; + + ti,vc-channel = <&vc_mpu>; + ti,min-step-micro-volts = <10000>; + ti,max-step-micro-volts = <50000>; + }; + + vp_iva: vp@0x4A307B70 { + compatible = "ti,omap4-vp"; + + reg = <0x4A307B70 0x18>, <0x4A306010 0x4>; + reg-names = "base-address", "int-address"; + ti,tranxdone-status-mask=<0x20000000>; + + clocks = <&sysclk_in>; + + ti,vc-channel = <&vc_iva>; + ti,min-step-micro-volts = <10000>; + ti,max-step-micro-volts = <50000>; + }; + + vp_core: vp@0x4A307B40 { + compatible = "ti,omap4-vp"; + + reg = <0x4A307b40 0x18>, <0x4A306010 0x4>; + reg-names = "base-address", "int-address"; + ti,tranxdone-status-mask=<0x200000>; + + clocks = <&sysclk_in>; + + regulator_name = "vdd_core"; + ti,vc-channel = <&vc_core>; + ti,min-step-micro-volts = <10000>; + ti,max-step-micro-volts = <50000>; + }; }; }; diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi index 2b0deb5..e759937 100644 --- a/arch/arm/boot/dts/omap443x.dtsi +++ b/arch/arm/boot/dts/omap443x.dtsi @@ -46,3 +46,18 @@ ti,retention-micro-volts = <750000>; ti,off-micro-volts = <0>; }; + +&vp_mpu { + ti,min-micro-volts = <750000>; + ti,max-micro-volts = <1388000>; +}; + +&vp_iva { + ti,min-micro-volts = <750000>; + ti,max-micro-volts = <1291000>; +}; + +&vp_core { + ti,min-micro-volts = <750000>; + ti,max-micro-volts = <1127000>; +}; diff --git a/arch/arm/boot/dts/omap4460.dtsi b/arch/arm/boot/dts/omap4460.dtsi index 16210a1..8320865 100644 --- a/arch/arm/boot/dts/omap4460.dtsi +++ b/arch/arm/boot/dts/omap4460.dtsi @@ -55,3 +55,18 @@ ti,retention-micro-volts = <750000>; ti,off-micro-volts = <0>; }; + +&vp_mpu { + ti,min-micro-volts = <750000>; + ti,max-micro-volts = <1380000>; +}; + +&vp_iva { + ti,min-micro-volts = <750000>; + ti,max-micro-volts = <1375000>; +}; + +&vp_core { + ti,min-micro-volts = <750000>; + ti,max-micro-volts = <1250000>; +};