From patchwork Wed Jun 26 09:28:19 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hiroshi DOYU X-Patchwork-Id: 2788111 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 342869F968 for ; Wed, 26 Jun 2013 19:51:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 48E2520104 for ; Wed, 26 Jun 2013 19:51:17 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 238EF200EA for ; Wed, 26 Jun 2013 19:51:16 +0000 (UTC) Received: from merlin.infradead.org ([205.233.59.134]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UrsNH-0007xU-JT; Wed, 26 Jun 2013 16:15:16 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UrsMm-0007Av-VB; Wed, 26 Jun 2013 16:14:44 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UrsJT-0004Cu-T2 for linux-arm-kernel@merlin.infradead.org; Wed, 26 Jun 2013 16:11:20 +0000 Received: from hqemgate16.nvidia.com ([216.228.121.65]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Urm3d-00041S-IX for linux-arm-kernel@lists.infradead.org; Wed, 26 Jun 2013 09:30:34 +0000 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Wed, 26 Jun 2013 02:28:57 -0700 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Wed, 26 Jun 2013 02:27:19 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Wed, 26 Jun 2013 02:27:19 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server id 8.3.298.1; Wed, 26 Jun 2013 02:29:22 -0700 Received: from sc-daphne.nvidia.com (Not Verified[172.20.232.60]) by hqnvemgw01.nvidia.com with MailMarshal (v7,1,2,5326) id ; Wed, 26 Jun 2013 02:29:22 -0700 Received: from oreo.Nvidia.com (dhcp-10-21-26-134.nvidia.com [10.21.26.134]) by sc-daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r5Q9SmR1017123; Wed, 26 Jun 2013 02:29:21 -0700 (PDT) From: Hiroshi Doyu To: Subject: [PATCH 16/23] iommu/tegra: smmu: Get "nvidia,swgroups" from DT Date: Wed, 26 Jun 2013 12:28:19 +0300 Message-ID: <1372238906-9346-17-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.8.1.5 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130626_103033_831873_EA30F70C X-CRM114-Status: GOOD ( 12.91 ) X-Spam-Score: -3.2 (---) Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hiroshi Doyu X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Get "nvidia,swgroups" from DT, which indicates which HardWare Accelerators(HWAs) can be available on specific Tegra SoC. Needed for the unified SMMU driver. Signed-off-by: Hiroshi Doyu --- drivers/iommu/tegra-smmu.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 95c6c80..c67131e 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -307,6 +307,8 @@ struct smmu_device { struct device *dev; struct page *avp_vector_page; /* dummy page shared by all AS's */ + u64 swgroups; /* swgroup ID bitmap */ + /* * Register image savers for suspend/resume */ @@ -1210,6 +1212,7 @@ static int tegra_smmu_probe(struct platform_device *pdev) int i, asids, err = 0; dma_addr_t uninitialized_var(base); size_t bytes, uninitialized_var(size); + u64 swgroups; if (smmu_handle) return -EIO; @@ -1219,6 +1222,9 @@ static int tegra_smmu_probe(struct platform_device *pdev) if (of_property_read_u32(dev->of_node, "nvidia,#asids", &asids)) return -ENODEV; + if (of_property_read_u64(dev->of_node, "nvidia,swgroups", &swgroups)) + return -ENODEV; + bytes = sizeof(*smmu) + asids * (sizeof(*smmu->as) + sizeof(struct dma_iommu_mapping *)); smmu = devm_kzalloc(dev, bytes, GFP_KERNEL); @@ -1267,6 +1273,7 @@ static int tegra_smmu_probe(struct platform_device *pdev) smmu->num_as = asids; smmu->iovmm_base = base; smmu->page_count = size; + smmu->swgroups = swgroups; smmu->translation_enable_0 = ~0; smmu->translation_enable_1 = ~0;