| Message ID | 1372238906-9346-19-git-send-email-hdoyu@nvidia.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Jun 26, 2013 at 12:28:21PM +0300, Hiroshi Doyu wrote: > Make PCIe work as it is. IOMMU support can be implemented later. > > Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> > --- > drivers/iommu/tegra-smmu.c | 3 +++ > 1 file changed, 3 insertions(+) Can you provide more information about what the problem is here? Why is PCIe not working when mapped through the IOMMU? Thierry
On Wed, Jun 26, 2013 at 01:09:06PM +0200, Hiroshi Doyu wrote: > Thierry Reding <thierry.reding@gmail.com> wrote @ Wed, 26 Jun 2013 13:06:27 +0200: > > > * PGP Signed by an unknown key > > > > On Wed, Jun 26, 2013 at 12:28:21PM +0300, Hiroshi Doyu wrote: > > > Make PCIe work as it is. IOMMU support can be implemented later. > > > > > > Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> > > > --- > > > drivers/iommu/tegra-smmu.c | 3 +++ > > > 1 file changed, 3 insertions(+) > > > > Can you provide more information about what the problem is here? Why is > > PCIe not working when mapped through the IOMMU? > > I haven't had a code to register PCI device as IOMMU'able as > ops->add_device() does for platform_devices. I'll add this comment. Okay, that should be solved then when we merge the PCIe driver. I hope that can happen soon. Thierry
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 64da08a..6e82df3 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -402,6 +402,9 @@ static int __smmu_client_set_hwgrp(struct smmu_client *c, for_each_set_bit(i, (unsigned long *)&map, sizeof(map) * BITS_PER_BYTE) { + if (i == SWGID_AFI) /* FIXME: IOMMU'able PCIe */ + continue; + offs = HWGRP_ASID_REG(i); val = smmu_read(smmu, offs); if (on) {
Make PCIe work as it is. IOMMU support can be implemented later. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> --- drivers/iommu/tegra-smmu.c | 3 +++ 1 file changed, 3 insertions(+)