diff mbox

ARM: dts: i.MX27: Add Secondary AHB Port definitions

Message ID 1372487325-14405-1-git-send-email-shc_work@mail.ru (mailing list archive)
State New, archived
Headers show

Commit Message

Alexander Shiyan June 29, 2013, 6:28 a.m. UTC
Patch adds Secondary AHB Port definitions for i.MX27 SOC and
moves NAND Flash Controller (NFC) under AHB Slave Port 1.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 arch/arm/boot/dts/imx27.dtsi | 28 ++++++++++++++++++++++------
 1 file changed, 22 insertions(+), 6 deletions(-)

Comments

Shawn Guo July 1, 2013, 12:58 p.m. UTC | #1
On Sat, Jun 29, 2013 at 10:28:45AM +0400, Alexander Shiyan wrote:
> Patch adds Secondary AHB Port definitions for i.MX27 SOC and
> moves NAND Flash Controller (NFC) under AHB Slave Port 1.
> 
> Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> ---
>  arch/arm/boot/dts/imx27.dtsi | 28 ++++++++++++++++++++++------
>  1 file changed, 22 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
> index 86b6f5f..7c0179e 100644
> --- a/arch/arm/boot/dts/imx27.dtsi
> +++ b/arch/arm/boot/dts/imx27.dtsi
> @@ -399,14 +399,30 @@
>  			};
>  		};
>  
> -		nfc: nand@d8000000 {
> +		ahb1: ahb@80000000 { /* Secondary AHB Slave Port 1 */

We do not have the top level of AHB bus topology represented in device
tree.  Your patch introduces it, partially - all about Secondary AHB
Slave but nothing about Primary AHB.

I'm not really fond of the change, since it's not extremely useful to
me.  Do you have a real reason for the change?

Shawn

> +			compatible = "fsl,ahb-bus", "simple-bus";
>  			#address-cells = <1>;
>  			#size-cells = <1>;
> -			compatible = "fsl,imx27-nand";
> -			reg = <0xd8000000 0x1000>;
> -			interrupts = <29>;
> -			clocks = <&clks 54>;
> -			status = "disabled";
> +			reg = <0x80000000 0x20000000>;
> +			ranges;
> +		};
> +
> +		ahb2: ahb@a0000000 { /* Secondary AHB Slave Port 2 */
> +			compatible = "fsl,ahb-bus", "simple-bus";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			reg = <0xa0000000 0x40000000>;
> +			ranges;
> +
> +			nfc: nand@d8000000 {
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				compatible = "fsl,imx27-nand";
> +				reg = <0xd8000000 0x1000>;
> +				interrupts = <29>;
> +				clocks = <&clks 54>;
> +				status = "disabled";
> +			};
>  		};
>  
>  		iram: iram@ffff4c00 {
> -- 
> 1.8.1.5
>
Alexander Shiyan July 1, 2013, 2:08 p.m. UTC | #2
> On Sat, Jun 29, 2013 at 10:28:45AM +0400, Alexander Shiyan wrote:
> > Patch adds Secondary AHB Port definitions for i.MX27 SOC and
> > moves NAND Flash Controller (NFC) under AHB Slave Port 1.
> > 
> > Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> > ---
> >  arch/arm/boot/dts/imx27.dtsi | 28 ++++++++++++++++++++++------
> >  1 file changed, 22 insertions(+), 6 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
> > index 86b6f5f..7c0179e 100644
> > --- a/arch/arm/boot/dts/imx27.dtsi
> > +++ b/arch/arm/boot/dts/imx27.dtsi
> > @@ -399,14 +399,30 @@
> >  			};
> >  		};
> >  
> > -		nfc: nand@d8000000 {
> > +		ahb1: ahb@80000000 { /* Secondary AHB Slave Port 1 */
> 
> We do not have the top level of AHB bus topology represented in device
> tree.  Your patch introduces it, partially - all about Secondary AHB
> Slave but nothing about Primary AHB.
> 
> I'm not really fond of the change, since it's not extremely useful to
> me.  Do you have a real reason for the change?

Introducing primary bus will produce a completely different i.MX27 DTS,
since it contain AIPI1,2 and iram.
Introduction of buses has no effect, other than the possibility of using labels
and minimal validation of nodes to the correct address.
In this case, I define the bus here for the subsequent addition of WEIM,
for a better understanding of what and where is.
Of course we can do without it. Think is it unnecessary?
Thanks.

---
Shawn Guo July 1, 2013, 2:17 p.m. UTC | #3
On Mon, Jul 01, 2013 at 06:08:10PM +0400, Alexander Shiyan wrote:
> Introducing primary bus will produce a completely different i.MX27 DTS,
> since it contain AIPI1,2 and iram.

That's one reason I would stay away from the change, because if the
addition of Secondary AHB is accepted, it will be a little more
difficult for us to say NO to people who love to have Primary AHB added.

> Introduction of buses has no effect, other than the possibility of using labels
> and minimal validation of nodes to the correct address.

Only if there is no code in the kernel searching a node via node path.

> In this case, I define the bus here for the subsequent addition of WEIM,
> for a better understanding of what and where is.
> Of course we can do without it. Think is it unnecessary?

Great, please do without it then, thanks.

Shawn
diff mbox

Patch

diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 86b6f5f..7c0179e 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -399,14 +399,30 @@ 
 			};
 		};
 
-		nfc: nand@d8000000 {
+		ahb1: ahb@80000000 { /* Secondary AHB Slave Port 1 */
+			compatible = "fsl,ahb-bus", "simple-bus";
 			#address-cells = <1>;
 			#size-cells = <1>;
-			compatible = "fsl,imx27-nand";
-			reg = <0xd8000000 0x1000>;
-			interrupts = <29>;
-			clocks = <&clks 54>;
-			status = "disabled";
+			reg = <0x80000000 0x20000000>;
+			ranges;
+		};
+
+		ahb2: ahb@a0000000 { /* Secondary AHB Slave Port 2 */
+			compatible = "fsl,ahb-bus", "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0xa0000000 0x40000000>;
+			ranges;
+
+			nfc: nand@d8000000 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "fsl,imx27-nand";
+				reg = <0xd8000000 0x1000>;
+				interrupts = <29>;
+				clocks = <&clks 54>;
+				status = "disabled";
+			};
 		};
 
 		iram: iram@ffff4c00 {