From patchwork Wed Jul 17 08:11:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 2828485 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D3A21C0AB2 for ; Wed, 17 Jul 2013 08:14:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ADCB320158 for ; Wed, 17 Jul 2013 08:14:02 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 73E8320157 for ; Wed, 17 Jul 2013 08:14:01 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzMrH-0008FK-Lc; Wed, 17 Jul 2013 08:13:12 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzMr1-000327-B5; Wed, 17 Jul 2013 08:12:55 +0000 Received: from mail-pa0-f53.google.com ([209.85.220.53]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UzMqx-00030R-H6 for linux-arm-kernel@lists.infradead.org; Wed, 17 Jul 2013 08:12:52 +0000 Received: by mail-pa0-f53.google.com with SMTP id tj12so1697467pac.26 for ; Wed, 17 Jul 2013 01:12:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=3As23L64xDJaS6UFZrhff/gN896uS7P7DhQ8sVgWrf8=; b=ODK1dskAg6wBahVfmK+pkc5D2ZPwPAeUxzS85aToKQkx56eWBoZtn3x9OJHw0sN7fn aTrh0XTEG7aSxfanFc+6KgJ33AoU9Wrk5yR8RKPs4HAg/sbzYlVgdIPQPWf+M6Eic8Pz yjjMtwDL6q0FMtD+CjHRAVfFs1CWLb7TMXD4R8r40MaP5UlDx8OkM3Aov07MygHOGkHE Tpg/hSFmTyprbzrZpeyhZYDHfpc79wq8YJ4eS11WTMnrMrdLVeCGDuLWhU/ttf+53GiG 3pB6HfaWeF7Hctp50ZJyKiI3C+HyHy3SkTaV6aeEx/qjUZ8vXBao/EzeWOUp3CsFQwSU gpZw== X-Received: by 10.66.249.135 with SMTP id yu7mr6658472pac.15.1374048748284; Wed, 17 Jul 2013 01:12:28 -0700 (PDT) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id v20sm9067666paj.4.2013.07.17.01.12.23 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 17 Jul 2013 01:12:27 -0700 (PDT) From: Anup Patel To: kvmarm@lists.cs.columbia.edu Subject: [PATCH V3] arm64: KVM: Support X-Gene guest VCPU on APM X-Gene host Date: Wed, 17 Jul 2013 13:41:58 +0530 Message-Id: <1374048718-9455-1-git-send-email-anup.patel@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQnrbxkuMO+clPwDKcRqPhxDv+OO9aPQhTQBguy73trRLK2sat3qOWdpgXHkUjFLpO7ZrWRs X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130717_041251_631844_4D6F66AD X-CRM114-Status: GOOD ( 12.21 ) X-Spam-Score: -2.6 (--) Cc: linaro-kernel@lists.linaro.org, Anup Patel , patches@linaro.org, marc.zyngier@arm.com, catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, Pranavkumar Sawargaonkar X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch allows us to have X-Gene guest VCPU when using KVM arm64 on APM X-Gene host. We add KVM_ARM_TARGET_XGENE_POTENZA for X-Gene Potenza compatible guest VCPU and we return KVM_ARM_TARGET_XGENE_POTENZA in kvm_target_cpu() when running on X-Gene host with Potenza core. V3: - Reduce multiple "return -EINVAL" in kvm_target_cpu() V2: - Renamed KVM_ARM_TARGET_XGENE_V8 to KVM_ARM_TARGET_XGENE_POTENZA V1: - Initial patch with target named as KVM_ARM_TARGET_XGENE_V8 Signed-off-by: Anup Patel Signed-off-by: Pranavkumar Sawargaonkar --- arch/arm64/include/uapi/asm/kvm.h | 3 ++- arch/arm64/kvm/guest.c | 36 ++++++++++++++++++++++------------ arch/arm64/kvm/sys_regs_generic_v8.c | 3 +++ 3 files changed, 29 insertions(+), 13 deletions(-) diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index 5031f42..d9f026b 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -55,8 +55,9 @@ struct kvm_regs { #define KVM_ARM_TARGET_AEM_V8 0 #define KVM_ARM_TARGET_FOUNDATION_V8 1 #define KVM_ARM_TARGET_CORTEX_A57 2 +#define KVM_ARM_TARGET_XGENE_POTENZA 3 -#define KVM_ARM_NUM_TARGETS 3 +#define KVM_ARM_NUM_TARGETS 4 /* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */ #define KVM_ARM_DEVICE_TYPE_SHIFT 0 diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c index 2c3ff67..143d179 100644 --- a/arch/arm64/kvm/guest.c +++ b/arch/arm64/kvm/guest.c @@ -207,20 +207,32 @@ int __attribute_const__ kvm_target_cpu(void) unsigned long implementor = read_cpuid_implementor(); unsigned long part_number = read_cpuid_part_number(); - if (implementor != ARM_CPU_IMP_ARM) - return -EINVAL; - - switch (part_number) { - case ARM_CPU_PART_AEM_V8: - return KVM_ARM_TARGET_AEM_V8; - case ARM_CPU_PART_FOUNDATION: - return KVM_ARM_TARGET_FOUNDATION_V8; - case ARM_CPU_PART_CORTEX_A57: - /* Currently handled by the generic backend */ - return KVM_ARM_TARGET_CORTEX_A57; + switch (implementor) { + case ARM_CPU_IMP_ARM: + switch (part_number) { + case ARM_CPU_PART_AEM_V8: + return KVM_ARM_TARGET_AEM_V8; + case ARM_CPU_PART_FOUNDATION: + return KVM_ARM_TARGET_FOUNDATION_V8; + case ARM_CPU_PART_CORTEX_A57: + return KVM_ARM_TARGET_CORTEX_A57; + default: + break; + } + break; + case ARM_CPU_IMP_APM: + switch (part_number) { + case APM_CPU_PART_POTENZA: + return KVM_ARM_TARGET_XGENE_POTENZA; + default: + break; + } + break; default: - return -EINVAL; + break; } + + return -EINVAL; } int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, diff --git a/arch/arm64/kvm/sys_regs_generic_v8.c b/arch/arm64/kvm/sys_regs_generic_v8.c index 4268ab9..8fe6f76 100644 --- a/arch/arm64/kvm/sys_regs_generic_v8.c +++ b/arch/arm64/kvm/sys_regs_generic_v8.c @@ -90,6 +90,9 @@ static int __init sys_reg_genericv8_init(void) &genericv8_target_table); kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57, &genericv8_target_table); + kvm_register_target_sys_reg_table(KVM_ARM_TARGET_XGENE_POTENZA, + &genericv8_target_table); + return 0; } late_initcall(sys_reg_genericv8_init);