From patchwork Fri Aug 2 16:25:33 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 2838135 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6F551BF535 for ; Fri, 2 Aug 2013 18:31:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 702652038C for ; Fri, 2 Aug 2013 18:31:53 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7481E20375 for ; Fri, 2 Aug 2013 18:31:52 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V5IEC-0006R0-QH; Fri, 02 Aug 2013 16:29:21 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V5IDS-00084I-UQ; Fri, 02 Aug 2013 16:28:34 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V5IBu-0007pK-OH for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2013 16:27:07 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r72GQbKr031970; Fri, 2 Aug 2013 11:26:37 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r72GQb0J013598; Fri, 2 Aug 2013 11:26:37 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Fri, 2 Aug 2013 11:26:37 -0500 Received: from sokoban.tieu.ti.com (h78-17.vpn.ti.com [172.24.78.17]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r72GQ2Tb003114; Fri, 2 Aug 2013 11:26:35 -0500 From: Tero Kristo To: , , , , , Subject: [PATCHv5 14/31] ARM: dts: DRA7: Change apll_pcie_m2_ck to fixed factor clock Date: Fri, 2 Aug 2013 19:25:33 +0300 Message-ID: <1375460751-23676-15-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1375460751-23676-1-git-send-email-t-kristo@ti.com> References: <1375460751-23676-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130802_122659_067875_E61D5920 X-CRM114-Status: UNSURE ( 8.91 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -8.4 (--------) Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Keerthy X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Keerthy This patch changes apll_pcie_m2_ck to fixed factor clock as there are no configurable divider associated to m2. Signed-off-by: Keerthy Signed-off-by: Tero Kristo --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index b377526..eef899a 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -364,13 +364,10 @@ apll_pcie_clkvcoldo_div: apll_pcie_clkvcoldo_div { apll_pcie_m2_ck: apll_pcie_m2_ck@4a008224 { #clock-cells = <0>; - compatible = "ti,divider-clock"; + compatible = "fixed-factor-clock"; clocks = <&apll_pcie_ck>; - ti,autoidle-shift = <8>; - reg = <0x4a008224 0x4>; - bit-mask = <0x7f>; - index-starts-at-one; - ti,autoidle-low; + clock-mult = <1>; + clock-div = <1>; }; sys_clk1_dclk_div: sys_clk1_dclk_div@4ae061c8 {