From patchwork Sat Aug 3 14:09:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Shijie X-Patchwork-Id: 2838242 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id ED0DDBF535 for ; Sat, 3 Aug 2013 02:06:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0A7E1201E2 for ; Sat, 3 Aug 2013 02:06:07 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 02452201DA for ; Sat, 3 Aug 2013 02:06:06 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V5RE2-0005dA-J0; Sat, 03 Aug 2013 02:05:47 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V5RDu-0002t1-1G; Sat, 03 Aug 2013 02:05:38 +0000 Received: from mail-pa0-x236.google.com ([2607:f8b0:400e:c03::236]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V5RDs-0002rn-A1 for linux-arm-kernel@lists.infradead.org; Sat, 03 Aug 2013 02:05:36 +0000 Received: by mail-pa0-f54.google.com with SMTP id kx1so1277493pab.41 for ; Fri, 02 Aug 2013 19:05:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=SUz0dF0ihlg51Xdhrtcj9Sj3vQH+P0S0KTtNgvhNviY=; b=bRiKI/pXgXwAcPqzgbVhK/2kyCrY984NYpakc92PVqAWxQ5LSrk5KZjygSTgTqzEDQ FyLxZjJ5gCp94I4ucvoDXFfbR2T1xytiNszecUuGTP4rPpBNjNCcYu7lTpDceqX1NEd+ hjoG6TJQkHQT4uyTqjUsCOTNwFiACjRt3TGyss96LRt2xNCa8jfJWgaK3JD6EswYLOms Z866vWgisHeyroaIPi5YR4zWRSTkH+CCzaVJZ10G6TPqAXdm/cOn6NDrpe5VnWRgu7Ja PbV0Qo1xDhPj2/Ugx3IGkNflhCdKBoies2vfMFBPjJSNDiqFD8ih/gQOlAg+PIZfnZUV OU4g== X-Received: by 10.66.168.7 with SMTP id zs7mr13526006pab.152.1375495514440; Fri, 02 Aug 2013 19:05:14 -0700 (PDT) Received: from localhost.localdomain.Home ([218.81.151.176]) by mx.google.com with ESMTPSA id ss8sm13506703pab.6.2013.08.02.19.05.07 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 02 Aug 2013 19:05:13 -0700 (PDT) From: Huang Shijie To: gregkh@linuxfoundation.org Subject: [PATCH v3 1/3] serial: mxs: enable the DMA only when the RTS/CTS is valid Date: Sat, 3 Aug 2013 10:09:14 -0400 Message-Id: <1375538956-15862-2-git-send-email-shijie8@gmail.com> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1375538956-15862-1-git-send-email-shijie8@gmail.com> References: <1375538956-15862-1-git-send-email-shijie8@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130802_220536_437256_299150F7 X-CRM114-Status: GOOD ( 14.35 ) X-Spam-Score: 1.4 (+) Cc: stable@vger.kernel.org, Huang Shijie , linux-serial@vger.kernel.org, u.kleine-koenig@pengutronix.de, shawn.guo@linaro.org, Huang Shijie , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00, DATE_IN_FUTURE_12_24, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,FREEMAIL_FROM,RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Huang Shijie The original DMA support works only when RTS/CTS is enabled. (see the "e800163 serial: mxs-auart: add the DMA support for mx28") But after several patches, DMA support has lost this limit. (see the "bcc20f9 serial: mxs-auart: move to use generic DMA helper") So an UART without the RTS/CTS lines may also enables the DMA support, in which case the UART may gets unpredictable results. This patch adds an optional property for the UART DT node which indicates the UART has RTS and CTS lines, and it also means you enable the DMA support for this UART. This patch also adds a macro MXS_AUART_RTSCTS, and uses it to check RTS/CTS before we enable the DMA for the UART. Cc: stable@vger.kernel.org Signed-off-by: Huang Shijie Signed-off-by: Huang Shijie --- .../bindings/tty/serial/fsl-mxs-auart.txt | 4 ++++ drivers/tty/serial/mxs-auart.c | 7 ++++++- 2 files changed, 10 insertions(+), 1 deletions(-) diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt b/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt index 2c00ec6..59a40f1 100644 --- a/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt +++ b/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt @@ -10,6 +10,10 @@ Required properties: Refer to dma.txt and fsl-mxs-dma.txt for details. - dma-names: "rx" for RX channel, "tx" for TX channel. +Optional properties: +- fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines, + it also means you enable the DMA support for this UART. + Example: auart0: serial@8006a000 { compatible = "fsl,imx28-auart", "fsl,imx23-auart"; diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c index 736e95c..eac7b58 100644 --- a/drivers/tty/serial/mxs-auart.c +++ b/drivers/tty/serial/mxs-auart.c @@ -137,6 +137,7 @@ struct mxs_auart_port { #define MXS_AUART_DMA_ENABLED 0x2 #define MXS_AUART_DMA_TX_SYNC 2 /* bit 2 */ #define MXS_AUART_DMA_RX_READY 3 /* bit 3 */ +#define MXS_AUART_RTSCTS 4 /* bit 4 */ unsigned long flags; unsigned int ctrl; enum mxs_auart_type devtype; @@ -639,7 +640,8 @@ static void mxs_auart_settermios(struct uart_port *u, * we can only implement the DMA support for auart * in mx28. */ - if (is_imx28_auart(s) && (s->flags & MXS_AUART_DMA_CONFIG)) { + if (is_imx28_auart(s) && (s->flags & MXS_AUART_DMA_CONFIG) + && test_bit(MXS_AUART_RTSCTS, &s->flags)) { if (!mxs_auart_dma_init(s)) /* enable DMA tranfer */ ctrl2 |= AUART_CTRL2_TXDMAE | AUART_CTRL2_RXDMAE @@ -1009,6 +1011,9 @@ static int serial_mxs_probe_dt(struct mxs_auart_port *s, s->flags |= MXS_AUART_DMA_CONFIG; + if (of_get_property(np, "fsl,uart-has-rtscts", NULL)) + set_bit(MXS_AUART_RTSCTS, &s->flags); + return 0; }