From patchwork Wed Aug 7 15:09:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Moll X-Patchwork-Id: 2840349 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A67C99F498 for ; Wed, 7 Aug 2013 15:11:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 74DC1203A2 for ; Wed, 7 Aug 2013 15:11:48 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BD9822039D for ; Wed, 7 Aug 2013 15:11:46 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V75OO-0006F5-FU; Wed, 07 Aug 2013 15:11:16 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V75O8-0002uz-1G; Wed, 07 Aug 2013 15:11:00 +0000 Received: from service87.mimecast.com ([91.220.42.44]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V75Nf-0002rv-94 for linux-arm-kernel@lists.infradead.org; Wed, 07 Aug 2013 15:10:40 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Wed, 07 Aug 2013 16:10:08 +0100 Received: from hornet.Cambridge.Arm.com ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 7 Aug 2013 16:10:07 +0100 From: Pawel Moll To: Olof Johansson , Lorenzo Pieralisi Subject: [PATCH v2 3/5] ARM: vexpress: Add SCC to V2P-CA15_A7's device tree Date: Wed, 7 Aug 2013 16:09:46 +0100 Message-Id: <1375888188-30213-4-git-send-email-pawel.moll@arm.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1375888188-30213-1-git-send-email-pawel.moll@arm.com> References: <1375888188-30213-1-git-send-email-pawel.moll@arm.com> X-OriginalArrivalTime: 07 Aug 2013 15:10:07.0086 (UTC) FILETIME=[339590E0:01CE9380] X-MC-Unique: 113080716100808401 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130807_111031_504464_F336DBEE X-CRM114-Status: GOOD ( 11.40 ) X-Spam-Score: -2.6 (--) Cc: Pawel Moll , linux-arm-kernel@lists.infradead.org, nico@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP SCC (Serial Configuration Controller) is used to set initial conditions for the test chip (TC2). Its registers are also mapped in normal address space and used to obtain runtime information and for power management. Signed-off-by: Pawel Moll --- .../devicetree/bindings/arm/vexpress-scc.txt | 33 ++++++++++++++++++++++ arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 6 ++++ 2 files changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/vexpress-scc.txt diff --git a/Documentation/devicetree/bindings/arm/vexpress-scc.txt b/Documentation/devicetree/bindings/arm/vexpress-scc.txt new file mode 100644 index 0000000..ae5043e4 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/vexpress-scc.txt @@ -0,0 +1,33 @@ +ARM Versatile Express Serial Configuration Controller +----------------------------------------------------- + +Test chips for ARM Versatile Express platform implement SCC (Serial +Configuration Controller) interface, used to set initial conditions +for the test chip. + +In some cases its registers are also mapped in normal address space +and can be used to obtain runtime information about the chip internals +(like silicon temperature sensors) and as interface to other subsystems +like platform configuration control and power management. + +Required properties: + +- compatible value: "arm,vexpress-scc,", "arm,vexpress-scc"; + where is the full tile model name (as used + in the tile's Technical Reference Manual), + eg. for Coretile Express A15x2 A7x3 (V2P-CA15_A7): + compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc"; + +Optional properties: + +- reg: when the SCC is memory mapped, physical address and size of the + registers window +- interrupts: when the SCC can generate a system-level interrupt + +Example: + + scc@7fff0000 { + compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc"; + reg = <0 0x7fff0000 0 0x1000>; + interrupts = <0 95 4>; + }; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index d2803be..759b0cd 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -125,6 +125,12 @@ clock-names = "apb_pclk"; }; + scc@7fff0000 { + compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc"; + reg = <0 0x7fff0000 0 0x1000>; + interrupts = <0 95 4>; + }; + timer { compatible = "arm,armv7-timer"; interrupts = <1 13 0xf08>,