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Fri, 23 Aug 2013 15:36:10 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MRZ006GL0ZR9Y80@mmp2.samsung.com>; Fri, 23 Aug 2013 15:36:09 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/5] clk/exynos5420: add sclk_hdmiphy to the list of special clocks Date: Fri, 23 Aug 2013 12:27:54 +0530 Message-id: <1377241078-11808-2-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1377241078-11808-1-git-send-email-rahul.sharma@samsung.com> References: <1377241078-11808-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpmkeLIzCtJLcpLzFFi42JZI2JSq3uLSTzI4FijmMWk+xNYLL7v+sJu 0bvgKpvFpsfXWC1mnN/HZPF0wkU2i4Uv4i2mLDrManH4TTurxbEZSxgduDx2zrrL7nHn2h42 j81L6j36tqxi9Pi8SS6ANYrLJiU1J7MstUjfLoEr486V3ywFSwQqWo7lNTC+5e1i5OCQEDCR uL/PuouRE8gUk7hwbz1bFyMXh5DAUkaJgxffsUMkTCSmLtwJlZjOKPH16komCGc2k0T75NWs IFVsAroSsw8+YwSxRQS8JSaf+csOUsQscI5R4se+M2BFwgIREl1bfoIVsQioSqy60soEYvMK eEjcWdkFtU5RovvZBDYQm1PAU6Jh3huwXiGgmvt9Z8HOkBBYxy5x+9QzJohBAhLfJh9igfhH VmLTAWaIOZISB1fcYJnAKLyAkWEVo2hqQXJBcVJ6kYlecWJucWleul5yfu4mRmAEnP73bMIO xnsHrA8xJgONm8gsJZqcD4ygvJJ4Q2MzIwtTE1NjI3NLM9KElcR51VusA4UE0hNLUrNTUwtS i+KLSnNSiw8xMnFwSjUwym0IFmASDij8uzPr3hddi/iShfVbXlbu+50nasl6T/jaqbC7FZdn G3xdv/axyd6NDv4uKbv5looHhAi/Cf1kdnrCc12x3wXMhRfqrc0FjvGkemhemrj96AoFh97r cwJVH29dN/2S4OS26HsrbbZEHHwjf3qZVIIto+ixpitfVDaef7Dp2q9bgkosxRmJhlrMRcWJ AAu0eneWAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrIIsWRmVeSWpSXmKPExsVy+t9jQd1bTOJBBssesVtMuj+BxeL7ri/s Fr0LrrJZbHp8jdVixvl9TBZPJ1xks1j4It5iyqLDrBaH37SzWhybsYTRgctj56y77B53ru1h 89i8pN6jb8sqRo/Pm+QCWKMaGG0yUhNTUosUUvOS81My89JtlbyD453jTc0MDHUNLS3MlRTy EnNTbZVcfAJ03TJzgI5SUihLzCkFCgUkFhcr6dthmhAa4qZrAdMYoesbEgTXY2SABhLWMGbc ufKbpWCJQEXLsbwGxre8XYycHBICJhJTF+5kg7DFJC7cWw9kc3EICUxnlPh6dSUThDObSaJ9 8mpWkCo2AV2J2QefMYLYIgLeEpPP/GUHKWIWOMco8WPfGbAiYYEIia4tP8GKWARUJVZdaWUC sXkFPCTurOxih1inKNH9bALYak4BT4mGeW/AeoWAau73nWWbwMi7gJFhFaNoakFyQXFSeq6R XnFibnFpXrpecn7uJkZwhD2T3sG4qsHiEKMAB6MSD+8EZ7EgIdbEsuLK3EOMEhzMSiK8B/4C hXhTEiurUovy44tKc1KLDzEmA101kVlKNDkfGP15JfGGxibmpsamliYWJmaWpAkrifMebLUO FBJITyxJzU5NLUgtgtnCxMEp1cDoL83NobrYUuhVbBv7FK7phtvvXdAOvnwmbfOFrheyay66 XfjYtCTg1bkDBQmvtUon5czz9Q3bflWRc9re+YmBylu7Jzts6J2W05O6yPVUXYuxWNpTeY9j n/L+K6WLMh1aMUV+q/Gpbf+yjomyqRX/XhhYGCsQavlrx6yg46EZYeVfjh1TTb+uxFKckWio xVxUnAgAlajWZfQCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130823_023650_832318_0B3D097D X-CRM114-Status: GOOD ( 10.32 ) X-Spam-Score: -8.2 (--------) Cc: kgene.kim@samsung.com, mturquette@linaro.org, joshi@samsung.com, inki.dae@samsung.com, thomas.abraham@linaro.org, s.nawrocki@samsung.com, r.sh.open@gmail.com, Rahul Sharma X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, URIBL_RHS_DOB autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add sclk_hdmiphy to the list of exposed clocks. This is required by hdmi driver to change the parent of hdmi clock. Signed-off-by: Rahul Sharma --- Documentation/devicetree/bindings/clock/exynos5420-clock.txt | 1 + drivers/clk/samsung/clk-exynos5420.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt index 9bcc4b1..596a368 100644 --- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt @@ -59,6 +59,7 @@ clock which they consume. sclk_pwm 155 sclk_gscl_wa 156 sclk_gscl_wb 157 + sclk_hdmiphy 158 [Peripheral Clock Gates] diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index e035fd0..a86cadc 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -120,7 +120,7 @@ enum exynos5420_clks { sclk_i2s2, sclk_pcm1, sclk_pcm2, sclk_spdif, sclk_hdmi, sclk_pixel, sclk_dp1, sclk_mipi1, sclk_fimd1, sclk_maudio0, sclk_maupcm0, sclk_usbd300, sclk_usbd301, sclk_usbphy300, sclk_usbphy301, sclk_unipro, - sclk_pwm, sclk_gscl_wa, sclk_gscl_wb, + sclk_pwm, sclk_gscl_wa, sclk_gscl_wb, sclk_hdmiphy, /* gate clocks */ aclk66_peric = 256, uart0, uart1, uart2, uart3, i2c0, i2c1, i2c2, i2c3, @@ -297,7 +297,7 @@ static struct samsung_fixed_rate_clock exynos5420_fixed_rate_ext_clks[] __initda /* fixed rate clocks generated inside the soc */ static struct samsung_fixed_rate_clock exynos5420_fixed_rate_clks[] __initdata = { - FRATE(none, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), + FRATE(sclk_hdmiphy, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_pwi", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_usbh20", NULL, CLK_IS_ROOT, 48000000), FRATE(none, "mphy_refclk_ixtal24", NULL, CLK_IS_ROOT, 48000000),