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[RFC] ARM: KVM: vgic: Bump VGIC_NR_IRQS to 256

Message ID 1377242490-30132-1-git-send-email-christoffer.dall@linaro.org (mailing list archive)
State New, archived
Headers show

Commit Message

Christoffer Dall Aug. 23, 2013, 7:21 a.m. UTC 
The Versatile Express TC2 board, which we use as our main emulated
platform in QEMU, defines 160+32 == 192 interrupts, so limiting the
number of interrupts to 128 is not quite going to cut it for real board
emulation.

Note that this didn't use to be a problem because QEMU was buggy and
only defined 128 interrupts until recently.

  [ Sending this as an RFC, because I haven't convinced myself that
    this is even the right short-term fix.  On a longer-term we probably
    need a way for QEMU to tell the kernel how many IRQs it needs for a
    particular implementation of a CPU and a GIC, but on a shorter term
    we should at least support a real A15 configuration.  Note that this
    change increases the in-kernel memory consumption quite a bit,
    especially due to the irq-to-lr map, which could be reversed or
    turned into a hash table or list, at the sacrifice of some
    performance during world-switches to search the data structure. ]

Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
---
 include/kvm/arm_vgic.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox

Patch

diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
index 343744e..7e2d158 100644
--- a/include/kvm/arm_vgic.h
+++ b/include/kvm/arm_vgic.h
@@ -26,7 +26,7 @@ 
 #include <linux/types.h>
 #include <linux/irqchip/arm-gic.h>
 
-#define VGIC_NR_IRQS		128
+#define VGIC_NR_IRQS		256
 #define VGIC_NR_SGIS		16
 #define VGIC_NR_PPIS		16
 #define VGIC_NR_PRIVATE_IRQS	(VGIC_NR_SGIS + VGIC_NR_PPIS)