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Mon, 26 Aug 2013 17:51:10 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MS4003AKR90VJE0@mmp1.samsung.com>; Mon, 26 Aug 2013 17:51:09 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/5] clk/exynos5420: add sclk_hdmiphy to the list of special clocks Date: Mon, 26 Aug 2013 14:42:59 +0530 Message-id: <1377508383-15185-2-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1377508383-15185-1-git-send-email-rahul.sharma@samsung.com> References: <1377508383-15185-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpnkeLIzCtJLcpLzFFi42JZI2JSpftPTDrIYMlzEYtJ9yewWHzf9YXd onfBVTaLTY+vsVrMOL+PyeLphItsFgtfxFtMWXSY1eLwm3ZWi2MzljBarNr1h9GB22PnrLvs Hneu7WHz2Lyk3qNvyypGj8+b5AJYo7hsUlJzMstSi/TtErgy7lz5zVKwRKCi5VheA+Nb3i5G Dg4JAROJ6w8Vuxg5gUwxiQv31rN1MXJxCAksZZR4tKiLBSJhIrH78y9GiMQiRonHyxYxQziz mSROt+8Gq2IT0JWYffAZI4gtIuAtMfnMX3aQImaBp4wSd1b0s4EkhAUiJP4vm8wEYrMIqErc nv4crJlXwEPi+Ly3UOsUJbqfTQCr5xTwlLh85w4riC0EVHOvo40VomYXu8TcTZ4QcwQkvk0+ xALxjqzEpgPMECWSEgdX3GCZwCi8gJFhFaNoakFyQXFSepGpXnFibnFpXrpecn7uJkZgJJz+ 92ziDsb7B6wPMSYDjZvILCWanA+MpLySeENjMyMLUxNTYyNzSzPShJXEedVbrAOFBNITS1Kz U1MLUovii0pzUosPMTJxcEo1MPpkmt//Oy3zzjxN95U24RpF25UF7QscN3dzSovxVryvfST7 fKL7iaazJs+Kvq8QXqQ1ReK/pdvJ3uYZ74PmTG68q2+zfkVN4O5pJUfCK0LOG7JOT5QXdZZi 6bn97e6eaPvD20vvTGl8Ftq3vsUn42Tgjxve7rqTPy/tbVuzs7fA/lB5aHXnSSWW4oxEQy3m ouJEAFvP0nmaAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrGIsWRmVeSWpSXmKPExsVy+t9jAd1/YtJBBu1ruC0m3Z/AYvF91xd2 i94FV9ksNj2+xmox4/w+JounEy6yWSx8EW8xZdFhVovDb9pZLY7NWMJosWrXH0YHbo+ds+6y e9y5tofNY/OSeo++LasYPT5vkgtgjWpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw1DW0 tDBXUshLzE21VXLxCdB1y8wBukxJoSwxpxQoFJBYXKykb4dpQmiIm64FTGOErm9IEFyPkQEa SFjDmHHnym+WgiUCFS3H8hoY3/J2MXJySAiYSOz+/IsRwhaTuHBvPVsXIxeHkMAiRonHyxYx QzizmSROt+9mAaliE9CVmH3wGViHiIC3xOQzf9lBipgFnjJK3FnRzwaSEBaIkPi/bDITiM0i oCpxe/pzsGZeAQ+J4/PeskCsU5TofjYBrJ5TwFPi8p07rCC2EFDNvY421gmMvAsYGVYxiqYW JBcUJ6XnGukVJ+YWl+al6yXn525iBMfaM+kdjKsaLA4xCnAwKvHwBrBJBwmxJpYVV+YeYpTg YFYS4TUXBQrxpiRWVqUW5ccXleakFh9iTAa6aiKzlGhyPjAN5JXEGxqbmJsam1qaWJiYWZIm rCTOe7DVOlBIID2xJDU7NbUgtQhmCxMHp1QDo+WKHzvkmLKE+FTW9f/xfzTv3rpXD8p6njz8 7x7ztHr9qfsXCsPCPqx5KVQ6t1jQsaFA1uy9Tf90V5l1666zrb/2gVP9mtAjjeTLkv+uHG9o D5zA4iP6rJb5707pZ6HpH7eLWu5Ze2Lt8sy/k5bpn/+d5/Ezfc/K6Y23GkLtp97oWqnVGHLu wFYlluKMREMt5qLiRACitoXy+QIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130826_045135_244684_1B8E51EC X-CRM114-Status: GOOD ( 10.39 ) X-Spam-Score: -9.1 (---------) Cc: kgene.kim@samsung.com, mturquette@linaro.org, tomasz.figa@gmail.com, joshi@samsung.com, inki.dae@samsung.com, thomas.abraham@linaro.org, s.nawrocki@samsung.com, r.sh.open@gmail.com, Rahul Sharma X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add sclk_hdmiphy to the list of exposed clocks. This is required by hdmi driver to change the parent of hdmi clock. Signed-off-by: Rahul Sharma --- Documentation/devicetree/bindings/clock/exynos5420-clock.txt | 1 + drivers/clk/samsung/clk-exynos5420.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt index 9bcc4b1..596a368 100644 --- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt @@ -59,6 +59,7 @@ clock which they consume. sclk_pwm 155 sclk_gscl_wa 156 sclk_gscl_wb 157 + sclk_hdmiphy 158 [Peripheral Clock Gates] diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index e035fd0..a86cadc 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -120,7 +120,7 @@ enum exynos5420_clks { sclk_i2s2, sclk_pcm1, sclk_pcm2, sclk_spdif, sclk_hdmi, sclk_pixel, sclk_dp1, sclk_mipi1, sclk_fimd1, sclk_maudio0, sclk_maupcm0, sclk_usbd300, sclk_usbd301, sclk_usbphy300, sclk_usbphy301, sclk_unipro, - sclk_pwm, sclk_gscl_wa, sclk_gscl_wb, + sclk_pwm, sclk_gscl_wa, sclk_gscl_wb, sclk_hdmiphy, /* gate clocks */ aclk66_peric = 256, uart0, uart1, uart2, uart3, i2c0, i2c1, i2c2, i2c3, @@ -297,7 +297,7 @@ static struct samsung_fixed_rate_clock exynos5420_fixed_rate_ext_clks[] __initda /* fixed rate clocks generated inside the soc */ static struct samsung_fixed_rate_clock exynos5420_fixed_rate_clks[] __initdata = { - FRATE(none, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), + FRATE(sclk_hdmiphy, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_pwi", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_usbh20", NULL, CLK_IS_ROOT, 48000000), FRATE(none, "mphy_refclk_ixtal24", NULL, CLK_IS_ROOT, 48000000),