@@ -187,6 +187,11 @@ clock which they consume.
mout_hdmi 640
+ Divider ID
+ ----------------------------
+
+ dout_pixel 768
+
Example 1: An example of a clock controller node is listed below.
clock: clock-controller@0x10010000 {
@@ -143,6 +143,9 @@ enum exynos5420_clks {
/* mux clocks */
mout_hdmi = 640,
+ /* divider clocks */
+ dout_pixel = 768,
+
nr_clks,
};
@@ -463,7 +466,7 @@ static struct samsung_div_clock exynos5420_div_clks[] __initdata = {
DIV(none, "dout_fimd1", "mout_fimd1", DIV_DISP10, 0, 4),
DIV(none, "dout_mipi1", "mout_mipi1", DIV_DISP10, 16, 8),
DIV(none, "dout_dp1", "mout_dp1", DIV_DISP10, 24, 4),
- DIV(none, "dout_hdmi_pixel", "mout_pixel", DIV_DISP10, 28, 4),
+ DIV(dout_pixel, "dout_hdmi_pixel", "mout_pixel", DIV_DISP10, 28, 4),
/* Audio Block */
DIV(none, "dout_maudio0", "mout_maudio0", DIV_MAU, 20, 4),
dout_pixel is a new ID allocated for pixel clock divider. It is queried in the driver to pass as the parent to hdmi clock while switching between parents. Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com> --- Documentation/devicetree/bindings/clock/exynos5420-clock.txt | 5 +++++ drivers/clk/samsung/clk-exynos5420.c | 5 ++++- 2 files changed, 9 insertions(+), 1 deletion(-)