From patchwork Thu Aug 29 17:53:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Soren Brinkmann X-Patchwork-Id: 2851532 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 54DE9C0AB5 for ; Thu, 29 Aug 2013 17:55:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2FA592011D for ; Thu, 29 Aug 2013 17:55:10 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 34E2B200B9 for ; Thu, 29 Aug 2013 17:55:09 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VF6Qc-0000RS-Qq; Thu, 29 Aug 2013 17:54:43 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VF6QN-0003Rz-8M; Thu, 29 Aug 2013 17:54:27 +0000 Received: from mail-pb0-x22c.google.com ([2607:f8b0:400e:c01::22c]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VF6Pz-0003OH-Mg for linux-arm-kernel@lists.infradead.org; Thu, 29 Aug 2013 17:54:04 +0000 Received: by mail-pb0-f44.google.com with SMTP id xa7so773233pbc.3 for ; Thu, 29 Aug 2013 10:53:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=wCoCm4As9DgTnKPwwU5R9XNDnwjDWH7o3Fbit9wR9B4=; b=Ic/3HXRozxvgdWR4ucfqSXd0uIumMIANACEp7MgYltpVu8dDlaaiYM3MZXWHGIzRsL tJcdWo1R0swyLTIzQixS0MzIhgzKUuMHGj9yx6g2JOBi4AMGSOobAss+8NOqDatYXbQF yr8gSF9/77++2WCbtsfiOlhVLCfrvDz8n8WhVSoXaljGu3uyo2Zm8Pl+4Oa/prmStgAy WvPTKn3hBySaLzDiFzgJqDNgeCd+LDNBaqdWl+ckl9RqlaV3gDpNwp0zymeYKeyoSJSJ qVnaQEsmHpJebRxdvIOFueR4ulyOPneJKpx2loun5jsVMzV2M4KM/lNYxR4Fn8UDGINO 1FZw== X-Received: by 10.68.212.37 with SMTP id nh5mr5189903pbc.16.1377798822114; Thu, 29 Aug 2013 10:53:42 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id qf7sm42309919pac.14.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 29 Aug 2013 10:53:41 -0700 (PDT) From: Soren Brinkmann To: Michal Simek , Daniel Lezcano , Thomas Gleixner , John Stultz Subject: [PATCH RFC 2/3] clocksource/cadence_ttc: Make clocksource optional Date: Thu, 29 Aug 2013 10:53:09 -0700 Message-Id: <1377798790-28927-3-git-send-email-soren.brinkmann@xilinx.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1377798790-28927-1-git-send-email-soren.brinkmann@xilinx.com> References: <1377798790-28927-1-git-send-email-soren.brinkmann@xilinx.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130829_135403_880494_F663802D X-CRM114-Status: GOOD ( 12.65 ) X-Spam-Score: -1.9 (-) Cc: Soren Brinkmann , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.6 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On some platforms, like Zynq, the input clock for the TTC is directly derived from the CPU clock, which means it scales when cpufreq adjusts the CPU frequency. At the same time the clocksource core expects a clocksource to be stable and doesn't allow frequency adjustments. Therefore a new flag - 'input-clock-unstable' - is added to the DT bindings for this driver. In case the flag is present the driver does not register the timer as clocksource. Signed-off-by: Soren Brinkmann --- Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt | 4 ++++ drivers/clocksource/cadence_ttc_timer.c | 3 ++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt b/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt index 993695c..a936c0a 100644 --- a/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt +++ b/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt @@ -6,6 +6,10 @@ Required properties: - interrupts : A list of 3 interrupts; one per timer channel. - clocks: phandle to the source clock +Optional properties: +- input-clock-unstable : Mark the timer's input clock as unstable. E.g. it + scales with cpufreq. + Example: ttc0: ttc0@f8001000 { diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c index 99ec898..66aaf6a 100644 --- a/drivers/clocksource/cadence_ttc_timer.c +++ b/drivers/clocksource/cadence_ttc_timer.c @@ -407,7 +407,8 @@ static void __init ttc_timer_init(struct device_node *timer) BUG(); } - ttc_setup_clocksource(clk_cs, timer_baseaddr); + if (!of_property_read_bool(timer, "input-clock-unstable")) + ttc_setup_clocksource(clk_cs, timer_baseaddr); ttc_setup_clockevent(clk_ce, timer_baseaddr + 4, irq); pr_info("%s #0 at %p, irq=%d\n", timer->name, timer_baseaddr, irq);