From patchwork Fri Aug 30 09:48:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiubo Li X-Patchwork-Id: 2851859 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C46D2C0AB5 for ; Fri, 30 Aug 2013 09:54:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9A8A920257 for ; Fri, 30 Aug 2013 09:54:03 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5A6D220253 for ; Fri, 30 Aug 2013 09:54:02 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VFLO8-0003Xj-K2; Fri, 30 Aug 2013 09:53:09 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VFLNl-0000z1-SQ; Fri, 30 Aug 2013 09:52:45 +0000 Received: from co1ehsobe005.messaging.microsoft.com ([216.32.180.188] helo=co1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VFLNA-0000ty-QS for linux-arm-kernel@lists.infradead.org; Fri, 30 Aug 2013 09:52:15 +0000 Received: from mail20-co1-R.bigfish.com (10.243.78.251) by CO1EHSOBE011.bigfish.com (10.243.66.74) with Microsoft SMTP Server id 14.1.225.22; Fri, 30 Aug 2013 09:51:47 +0000 Received: from mail20-co1 (localhost [127.0.0.1]) by mail20-co1-R.bigfish.com (Postfix) with ESMTP id 31BE1400E1; Fri, 30 Aug 2013 09:51:47 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h8275bh1de097hz2dh2a8h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h1155h) Received: from mail20-co1 (localhost.localdomain [127.0.0.1]) by mail20-co1 (MessageSwitch) id 1377856305355220_15668; Fri, 30 Aug 2013 09:51:45 +0000 (UTC) Received: from CO1EHSMHS024.bigfish.com (unknown [10.243.78.245]) by mail20-co1.bigfish.com (Postfix) with ESMTP id 46E018C0067; Fri, 30 Aug 2013 09:51:45 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS024.bigfish.com (10.243.66.34) with Microsoft SMTP Server (TLS) id 14.16.227.3; Fri, 30 Aug 2013 09:51:44 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.3.146.2; Fri, 30 Aug 2013 09:51:43 +0000 Received: from rock.am.freescale.net (rock.ap.freescale.net [10.193.20.106]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r7U9pFST031672; Fri, 30 Aug 2013 02:51:39 -0700 From: Xiubo Li To: , Subject: [PATCHv2 4/4] Documentation: Add device tree bindings for Freescale FTM PWM. Date: Fri, 30 Aug 2013 17:48:52 +0800 Message-ID: <1377856132-11290-5-git-send-email-Li.Xiubo@freescale.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1377856132-11290-1-git-send-email-Li.Xiubo@freescale.com> References: <1377856132-11290-1-git-send-email-Li.Xiubo@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130830_055209_216474_3273DB15 X-CRM114-Status: UNSURE ( 9.38 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) Cc: mark.rutland@arm.com, linux-pwm@vger.kernel.org, linux@arm.linux.org.uk, ian.campbell@citrix.com, pawel.moll@arm.com, swarren@wwwdotorg.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, rob.herring@calxeda.com, devicetree@vger.kernel.org, rob@landley.net, grant.likely@linaro.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the document for Freescale FTM PWM driver under Documentation/devicetree/bindings/pwm/. Signed-off-by: Xiubo Li --- .../devicetree/bindings/pwm/pwm-fsl-ftm.txt | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt new file mode 100644 index 0000000..b2b5214 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt @@ -0,0 +1,40 @@ +Freescale FTM PWM controller + +Required properties: +- compatible: Should be "fsl,vf610-ftm-pwm" +- reg: Physical base address and length of the controller's registers +- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of + the cells format. +- clock-names : Includes the following module clock source entries: + "ftm0" (system clock), + "ftm0_fix_sel" (fixed frequency clock), + "ftm0_ext_sel" (external clock) +- clocks : Must contain an entry list for entries in clock-names. +- fsl,pwm-counter-clk: The FTM PWM counter clock source, should be one of the + entries in clock-names. +- fsl,pwm-avaliable-chs: The FTM channels ID list of current board which are + available as PWM function. +- For each channel's pinctrl, the "chN-active" and "chN-idle" states should be + implemented at same time. + +Example: + +pwm0: pwm@40038000 { + compatible = "fsl,vf610-ftm-pwm"; + reg = <0x40038000 0x1000>; + #pwm-cells = <3>; + clock-names = "ftm0", "ftm0_fix_sel", "ftm0_ext_sel"; + clocks = <&clks VF610_CLK_FTM0>, + <&clks VF610_CLK_FTM0_FIX_SEL>, + <&clks VF610_CLK_FTM0_EXT_SEL>; + pinctrl-names = "ch0-active", "ch0-idle", "ch1-active", "ch1-idle", + ....; + pinctrl-0 = <&pinctrl_pwm0_ch0_active>; + pinctrl-1 = <&pinctrl_pwm0_ch0_idle>; + pinctrl-2 = <&pinctrl_pwm0_ch1_active>; + pinctrl-3 = <&pinctrl_pwm0_ch1_idle>; + ... + fsl,pwm-counter-clk = "ftm0_ext_sel"; + fsl,pwm-avaliable-chs = <0 3 5 6>; + ... +};