From patchwork Fri Aug 30 19:10:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 2852204 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A1BD6C0AB5 for ; Fri, 30 Aug 2013 19:25:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C97412048E for ; Fri, 30 Aug 2013 19:25:09 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7E1B2204A9 for ; Fri, 30 Aug 2013 19:25:08 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VFUJe-0001oZ-Az; Fri, 30 Aug 2013 19:25:06 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VFUJc-00005g-4X; Fri, 30 Aug 2013 19:25:04 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VFUJZ-00005U-5g for linux-arm-kernel@merlin.infradead.org; Fri, 30 Aug 2013 19:25:01 +0000 Received: from 82-68-191-81.dsl.posilan.com ([82.68.191.81] helo=rainbowdash.ducie.codethink.co.uk) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VFUJW-0001mB-Qv for linux-arm-kernel@lists.infradead.org; Fri, 30 Aug 2013 19:24:59 +0000 Received: from ben by rainbowdash.ducie.codethink.co.uk with local (Exim 4.80) (envelope-from ) id 1VFU6A-0002UK-B1; Fri, 30 Aug 2013 20:11:10 +0100 From: Ben Dooks To: linux-arm-kernel@lists.infradead.org, steve.mcintyre@linaro.org, linux@arm.linux.org.uk, thomas.petazzoni@free-electrons.com, dave.martin@arm.com, will.deacon@arm.com, victor.kamensky@linaro.org Subject: [PATCH 15/20] ARM: hardware: fix endian-ness in Date: Fri, 30 Aug 2013 20:10:51 +0100 Message-Id: <1377889856-9447-16-git-send-email-ben.dooks@codethink.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1377889856-9447-1-git-send-email-ben.dooks@codethink.co.uk> References: <1377889856-9447-1-git-send-email-ben.dooks@codethink.co.uk> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130830_202458_903618_F66682D0 X-CRM114-Status: UNSURE ( 9.90 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.3 (/) Cc: Ben Dooks X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The needs to take into account the endian-ness of the processor when reading and writing data, so change to using the readl/writel relaxed variants from the raw ones. Signed-off-by: Ben Dooks --- arch/arm/include/asm/hardware/coresight.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h index 0cf7a6b..ad774f3 100644 --- a/arch/arm/include/asm/hardware/coresight.h +++ b/arch/arm/include/asm/hardware/coresight.h @@ -24,8 +24,8 @@ #define TRACER_TIMEOUT 10000 #define etm_writel(t, v, x) \ - (__raw_writel((v), (t)->etm_regs + (x))) -#define etm_readl(t, x) (__raw_readl((t)->etm_regs + (x))) + (writel_relaxed((v), (t)->etm_regs + (x))) +#define etm_readl(t, x) (readl_relaxed((t)->etm_regs + (x))) /* CoreSight Management Registers */ #define CSMR_LOCKACCESS 0xfb0 @@ -142,8 +142,8 @@ #define ETBFF_TRIGFL BIT(10) #define etb_writel(t, v, x) \ - (__raw_writel((v), (t)->etb_regs + (x))) -#define etb_readl(t, x) (__raw_readl((t)->etb_regs + (x))) + (writel_relaxed((v), (t)->etb_regs + (x))) +#define etb_readl(t, x) (readl_relaxed((t)->etb_regs + (x))) #define etm_lock(t) do { etm_writel((t), 0, CSMR_LOCKACCESS); } while (0) #define etm_unlock(t) \