From patchwork Wed Sep 4 14:33:28 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roland Stigge X-Patchwork-Id: 2853708 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 94A419F4D4 for ; Wed, 4 Sep 2013 14:36:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DBF5C203AE for ; Wed, 4 Sep 2013 14:36:33 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6CC4C20399 for ; Wed, 4 Sep 2013 14:36:31 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VHEBl-00032w-SR; Wed, 04 Sep 2013 14:36:10 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VHEBb-0006sX-9t; Wed, 04 Sep 2013 14:35:59 +0000 Received: from mail.work-microwave.de ([62.245.205.51]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VHEBV-0006qh-Sa for linux-arm-kernel@lists.infradead.org; Wed, 04 Sep 2013 14:35:55 +0000 Received: from rst-pc1.lan.work-microwave.de ([192.168.11.78]) by mail.work-microwave.de with ESMTP id r84EZOZ6002898-r84EZOZ7002898; Wed, 4 Sep 2013 15:35:24 +0100 Received: by rst-pc1.lan.work-microwave.de (Postfix, from userid 1000) id A57A8AE08F; Wed, 4 Sep 2013 16:33:31 +0200 (CEST) From: Roland Stigge To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] ARM: LPC32xx: Fix reset function Date: Wed, 4 Sep 2013 16:33:28 +0200 Message-Id: <1378305208-5330-1-git-send-email-stigge@antcom.de> X-Mailer: git-send-email 1.8.4.rc3 X-FEAS-SYSTEM-WL: rst@work-microwave.de X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130904_103554_214448_E539BC55 X-CRM114-Status: GOOD ( 11.66 ) X-Spam-Score: -4.3 (----) Cc: Roland Stigge X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In the recent change to the reset function API (commit 7b6d864b48d95e6ea1df7df64475b9cb9616dcf9), the mode argument changed from a char to an enum. lpc23xx_restart() only handles REBOOT_SOFT and REBOOT_HARD, but the new kernel code emits REBOOT_COLD (0) on reboots now which leads to lpc32xx simply not rebooting (but halting). This patch fixes this by just resetting unconditionally as on other platforms (e.g. mach-bcm2835). Pulling lpc32xx_watchdog_reset() into lpc23xx_restart() since the while() in lpc23xx_restart() is part of the procedure anyway and lpc32xx_watchdog_reset() isn't used anywhere else anymore. Signed-off-by: Roland Stigge --- Will provide a pull request for arm-soc when someone commented on this one. --- arch/arm/mach-lpc32xx/common.c | 29 ++++++----------------------- 1 file changed, 6 insertions(+), 23 deletions(-) --- linux-2.6.orig/arch/arm/mach-lpc32xx/common.c +++ linux-2.6/arch/arm/mach-lpc32xx/common.c @@ -57,20 +57,6 @@ int clk_is_sysclk_mainosc(void) } /* - * System reset via the watchdog timer - */ -static void lpc32xx_watchdog_reset(void) -{ - /* Make sure WDT clocks are enabled */ - __raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN, - LPC32XX_CLKPWR_TIMER_CLK_CTRL); - - /* Instant assert of RESETOUT_N with pulse length 1mS */ - __raw_writel(13000, io_p2v(LPC32XX_WDTIM_BASE + 0x18)); - __raw_writel(0x70, io_p2v(LPC32XX_WDTIM_BASE + 0xC)); -} - -/* * Detects and returns IRAM size for the device variation */ #define LPC32XX_IRAM_BANK_SIZE SZ_128K @@ -209,16 +195,13 @@ void __init lpc32xx_map_io(void) void lpc23xx_restart(enum reboot_mode mode, const char *cmd) { - switch (mode) { - case REBOOT_SOFT: - case REBOOT_HARD: - lpc32xx_watchdog_reset(); - break; + /* Make sure WDT clocks are enabled */ + __raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN, + LPC32XX_CLKPWR_TIMER_CLK_CTRL); - default: - /* Do nothing */ - break; - } + /* Instant assert of RESETOUT_N with pulse length 1mS */ + __raw_writel(13000, io_p2v(LPC32XX_WDTIM_BASE + 0x18)); + __raw_writel(0x70, io_p2v(LPC32XX_WDTIM_BASE + 0xC)); /* Wait for watchdog to reset system */ while (1)