From patchwork Fri Sep 20 21:13:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Bresticker X-Patchwork-Id: 2921561 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 665BC9F1E2 for ; Fri, 20 Sep 2013 21:14:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 88B1420461 for ; Fri, 20 Sep 2013 21:14:34 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8345820457 for ; Fri, 20 Sep 2013 21:14:33 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VN822-00074x-QO; Fri, 20 Sep 2013 21:14:30 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VN820-0005sw-7l; Fri, 20 Sep 2013 21:14:28 +0000 Received: from mail-ye0-f201.google.com ([209.85.213.201]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VN81w-0005rc-Ks for linux-arm-kernel@lists.infradead.org; Fri, 20 Sep 2013 21:14:25 +0000 Received: by mail-ye0-f201.google.com with SMTP id q3so108526yen.0 for ; Fri, 20 Sep 2013 14:14:02 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Dj3N/ZmmxmKdpMNS3/hrlA2m3KhwfNcYlng0bdx3upQ=; b=kBsnSepwlEXPZOlbITYafBqrG021WAAFT4AglOsgDPKW1c67z3kiJwI3CX7OCcaS8V j+S3uiE4S7MFp7uQ4592UNrwZpCdnBL6NXw+i+PEP0oHYjYVwr6YDXprlMx6l4XjyTeo GCkDCTcpkaoqyyfnzO5X6cevNNizMyKioZQ+t6IowhRqYGyUL+mOmiblSmDp3LoR/HDy JxriQQw38eVgJbC8mXvhOGmYKfIIQSUf6UhXgIcfieSF/IhdPNl4zEOfTjJ4DPt48Znu Q9PU9M5paWCZIt6qZREX3x274mT4NxS45P3tSq88O4p7oKkUIPN8jl+bkeux0NCsry0w yXuQ== X-Gm-Message-State: ALoCoQm+263aCVQEphRvXh8se//x7xm0c4Ifo616+PeNTId5stOtWYieGzpOToerXoQftRVaoyn3jyYSG8Ojc4hJy8Pz6se3bnxN+StuoXRDS+Mx3ou2VBe00vgt3F6JQ5Mrw1SV08BaReN/bZC1HMb5aFycHlohZv2QHANU1Ut4GyR/ow3CihuzMFT2Wt4ve2pL33gm6jw4CB+AMvLpom2ndzUNZCfD6w== X-Received: by 10.236.220.39 with SMTP id n37mr3197524yhp.15.1379711642332; Fri, 20 Sep 2013 14:14:02 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id a42si1719138yhj.6.1969.12.31.16.00.00 (version=TLSv1.1 cipher=AES128-SHA bits=128/128); Fri, 20 Sep 2013 14:14:02 -0700 (PDT) Received: from abrestic.mtv.corp.google.com (abrestic.mtv.corp.google.com [172.22.72.111]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id 080575A42A8; Fri, 20 Sep 2013 14:14:02 -0700 (PDT) Received: by abrestic.mtv.corp.google.com (Postfix, from userid 137652) id 909E922082B; Fri, 20 Sep 2013 14:14:01 -0700 (PDT) From: Andrew Bresticker To: linux-samsung-soc@vger.kernel.org Subject: [PATCH 1/6] clk: exynos-audss: convert to platform device Date: Fri, 20 Sep 2013 14:13:52 -0700 Message-Id: <1379711637-5226-1-git-send-email-abrestic@chromium.org> X-Mailer: git-send-email 1.8.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130920_171424_776106_E560DEE8 X-CRM114-Status: GOOD ( 18.42 ) X-Spam-Score: 0.2 (/) Cc: Mark Rutland , Yadwinder Singh Brar , linux-doc@vger.kernel.org, Andrew Bresticker , Tomasz Figa , linux-kernel@vger.kernel.org, Tushar Behera , Kukjin Kim , Russell King , Sachin Kamat , Stephen Warren , Grant Likely , devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , Rob Herring , Mike Turquette , linux-arm-kernel@lists.infradead.org, Rahul Sharma , Padmavathi Venna , Jiri Kosina , Stephen Boyd , Doug Anderson , Leela Krishna Amudala , Rob Landley X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Exynos AudioSS clock controller will later be modified to allow input clocks to be specified via device-tree in order to support multiple Exynos SoCs. This will introduce a dependency on the core SoC clock controller being initialized first so that the AudioSS driver can look up its input clocks, but the order in which clock providers are probed in of_clk_init() is not guaranteed. Since deferred probing is not supported in of_clk_init() and the AudioSS block is not the core controller, we can initialize it later as a platform device. Signed-off-by: Andrew Bresticker --- drivers/clk/samsung/clk-exynos-audss.c | 71 +++++++++++++++++++++++++++------- 1 file changed, 58 insertions(+), 13 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c index 39b40aa..7571e88 100644 --- a/drivers/clk/samsung/clk-exynos-audss.c +++ b/drivers/clk/samsung/clk-exynos-audss.c @@ -14,6 +14,8 @@ #include #include #include +#include +#include #include @@ -62,24 +64,29 @@ static struct syscore_ops exynos_audss_clk_syscore_ops = { #endif /* CONFIG_PM_SLEEP */ /* register exynos_audss clocks */ -static void __init exynos_audss_clk_init(struct device_node *np) +static int exynos_audss_clk_probe(struct platform_device *pdev) { - reg_base = of_iomap(np, 0); - if (!reg_base) { - pr_err("%s: failed to map audss registers\n", __func__); - return; + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + reg_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(reg_base)) { + dev_err(&pdev->dev, "failed to map audss registers\n"); + return PTR_ERR(reg_base); } - clk_table = kzalloc(sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS, + clk_table = devm_kzalloc(&pdev->dev, + sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS, GFP_KERNEL); if (!clk_table) { - pr_err("%s: could not allocate clk lookup table\n", __func__); - return; + dev_err(&pdev->dev, "could not allocate clk lookup table\n"); + return -ENOMEM; } clk_data.clks = clk_table; clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS; - of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); + of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, + &clk_data); clk_table[EXYNOS_MOUT_AUDSS] = clk_register_mux(NULL, "mout_audss", mout_audss_p, ARRAY_SIZE(mout_audss_p), @@ -128,8 +135,46 @@ static void __init exynos_audss_clk_init(struct device_node *np) #endif pr_info("Exynos: Audss: clock setup completed\n"); + + return 0; +} + +static int exynos_audss_clk_remove(struct platform_device *pdev) +{ + of_clk_del_provider(pdev->dev.of_node); + + return 0; } -CLK_OF_DECLARE(exynos4210_audss_clk, "samsung,exynos4210-audss-clock", - exynos_audss_clk_init); -CLK_OF_DECLARE(exynos5250_audss_clk, "samsung,exynos5250-audss-clock", - exynos_audss_clk_init); + +static const struct of_device_id exynos_audss_clk_of_match[] = { + { .compatible = "samsung,exynos4210-audss-clock", }, + { .compatible = "samsung,exynos5250-audss-clock", }, + {}, +}; + +static struct platform_driver exynos_audss_clk_driver = { + .driver = { + .name = "exynos-audss-clk", + .owner = THIS_MODULE, + .of_match_table = exynos_audss_clk_of_match, + }, + .probe = exynos_audss_clk_probe, + .remove = exynos_audss_clk_remove, +}; + +static int __init exynos_audss_clk_init(void) +{ + return platform_driver_register(&exynos_audss_clk_driver); +} +core_initcall(exynos_audss_clk_init); + +static void __init exynos_audss_clk_exit(void) +{ + platform_driver_unregister(&exynos_audss_clk_driver); +} +module_exit(exynos_audss_clk_exit); + +MODULE_AUTHOR("Padmavathi Venna "); +MODULE_DESCRIPTION("Exynos AudioSS Clock Controller"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:exynos-audss-clk");