From patchwork Fri Sep 20 21:13:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Bresticker X-Patchwork-Id: 2921621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6AF3FBFF05 for ; Fri, 20 Sep 2013 21:15:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9DF8C2045B for ; Fri, 20 Sep 2013 21:15:42 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ACFAC20459 for ; Fri, 20 Sep 2013 21:15:41 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VN82W-0007LG-0C; Fri, 20 Sep 2013 21:15:00 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VN82K-0005vy-G0; Fri, 20 Sep 2013 21:14:48 +0000 Received: from mail-vc0-f202.google.com ([209.85.220.202]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VN820-0005ri-LJ for linux-arm-kernel@lists.infradead.org; Fri, 20 Sep 2013 21:14:33 +0000 Received: by mail-vc0-f202.google.com with SMTP id gd11so108218vcb.1 for ; Fri, 20 Sep 2013 14:14:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9lUBPAPrqN0aWz7Erw1MKHZEtuUHKFm+ZNHyOfa9/GQ=; b=mpoT4xGW8THhRvfqURlG3VJboUH3FI+27X4J61LV6Adngf4LnNhZmBnxuuQuWjZITu GOEuS+vZLSfp7+jbQiLc2qpycfdkYzqgtrxivgBtjNPWaz92Da4GXQEvWmY07Lgin3Md 294sKSBw/hLrFhkCy3V31AkR7WXrolQF1Tgux6GN6pYcvXY7Csbx91/Af6Fq7usbbzeS qi0kddizY1v3AIbzoA2vmjJ40V8PxbSYu6T19yBTdiNN9KXcyzL5+BJ+BId6K+/IZKiN hRo7BI6oFDT/kesDc2lGPZUjqF/diZ4WBiylWcWjdwhGZ+YV5Ealyg8rgUm95Rh8KtKb mqQA== X-Gm-Message-State: ALoCoQmoWaoU/2E/BmzifPUqXrO5zMkVzpDZITC0hahmEwxL8ntt05P/RMuUuOzjpX9r6SvZrnretagPhf0aWlYRYeu6MPjfdu2wG4yoiYGubfr58JE89rVT8FdI2R5jvw9rMv7qk98cLrm/FaYDYm+STh0CVKYTY9gMERA6u8+KIXkQ86SHc4gTrIITxk9aDA0DRqPyIsorPVQjLxLO94rdClngSoBuAA== X-Received: by 10.236.54.68 with SMTP id h44mr3165862yhc.21.1379711646977; Fri, 20 Sep 2013 14:14:06 -0700 (PDT) Received: from corp2gmr1-1.hot.corp.google.com (corp2gmr1-1.hot.corp.google.com [172.24.189.92]) by gmr-mx.google.com with ESMTPS id z45si1718860yha.7.1969.12.31.16.00.00 (version=TLSv1.1 cipher=AES128-SHA bits=128/128); Fri, 20 Sep 2013 14:14:06 -0700 (PDT) Received: from abrestic.mtv.corp.google.com (abrestic.mtv.corp.google.com [172.22.72.111]) by corp2gmr1-1.hot.corp.google.com (Postfix) with ESMTP id C367731C262; Fri, 20 Sep 2013 14:14:06 -0700 (PDT) Received: by abrestic.mtv.corp.google.com (Postfix, from userid 137652) id 84FA522082B; Fri, 20 Sep 2013 14:14:06 -0700 (PDT) From: Andrew Bresticker To: linux-samsung-soc@vger.kernel.org Subject: [PATCH 3/6] clk: exynos5250: add clock ID for div_pcm0 Date: Fri, 20 Sep 2013 14:13:54 -0700 Message-Id: <1379711637-5226-3-git-send-email-abrestic@chromium.org> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1379711637-5226-1-git-send-email-abrestic@chromium.org> References: <1379711637-5226-1-git-send-email-abrestic@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130920_171428_881445_C318890A X-CRM114-Status: GOOD ( 11.50 ) X-Spam-Score: 0.2 (/) Cc: Mark Rutland , Yadwinder Singh Brar , linux-doc@vger.kernel.org, Andrew Bresticker , Tomasz Figa , linux-kernel@vger.kernel.org, Tushar Behera , Kukjin Kim , Russell King , Sachin Kamat , Stephen Warren , Grant Likely , devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , Rob Herring , Mike Turquette , linux-arm-kernel@lists.infradead.org, Rahul Sharma , Padmavathi Venna , Jiri Kosina , Stephen Boyd , Doug Anderson , Leela Krishna Amudala , Rob Landley X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There is no gate for the PCM clock input to the AudioSS block, so the parent of sclk_pcm is div_pcm0. Add a clock ID for it so that we can reference it in device trees. Signed-off-by: Andrew Bresticker Reviewed-by: Tomasz Figa --- Documentation/devicetree/bindings/clock/exynos5250-clock.txt | 1 + drivers/clk/samsung/clk-exynos5250.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt index 24765c1..67e9a47 100644 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt @@ -62,6 +62,7 @@ clock which they consume. div_i2s1 157 div_i2s2 158 sclk_hdmiphy 159 + div_pcm0 160 [Peripheral Clock Gates] diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index adf3234..dec5376 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -108,7 +108,7 @@ enum exynos5250_clks { sclk_mmc0, sclk_mmc1, sclk_mmc2, sclk_mmc3, sclk_sata, sclk_usb3, sclk_jpeg, sclk_uart0, sclk_uart1, sclk_uart2, sclk_uart3, sclk_pwm, sclk_audio1, sclk_audio2, sclk_spdif, sclk_spi0, sclk_spi1, sclk_spi2, - div_i2s1, div_i2s2, sclk_hdmiphy, + div_i2s1, div_i2s2, sclk_hdmiphy, div_pcm0, /* gate clocks */ gscl0 = 256, gscl1, gscl2, gscl3, gscl_wa, gscl_wb, smmu_gscl0, @@ -301,7 +301,7 @@ static struct samsung_div_clock exynos5250_div_clks[] __initdata = { DIV(none, "div_dp", "mout_dp", DIV_DISP1_0, 24, 4), DIV(none, "div_jpeg", "mout_jpeg", DIV_GEN, 4, 4), DIV(none, "div_audio0", "mout_audio0", DIV_MAU, 0, 4), - DIV(none, "div_pcm0", "sclk_audio0", DIV_MAU, 4, 8), + DIV(div_pcm0, "div_pcm0", "sclk_audio0", DIV_MAU, 4, 8), DIV(none, "div_sata", "mout_sata", DIV_FSYS0, 20, 4), DIV(none, "div_usb3", "mout_usb3", DIV_FSYS0, 24, 4), DIV(none, "div_mmc0", "mout_mmc0", DIV_FSYS1, 0, 4),