From patchwork Tue Sep 24 18:06:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Bresticker X-Patchwork-Id: 2934941 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 13DD59F524 for ; Tue, 24 Sep 2013 18:08:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D1935202F8 for ; Tue, 24 Sep 2013 18:08:10 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A66AB20417 for ; Tue, 24 Sep 2013 18:08:08 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VOX1T-0003Dz-Kq; Tue, 24 Sep 2013 18:07:43 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VOX1L-0008QJ-3H; Tue, 24 Sep 2013 18:07:35 +0000 Received: from mail-qe0-f73.google.com ([209.85.128.73]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VOX17-0008Mh-B0 for linux-arm-kernel@lists.infradead.org; Tue, 24 Sep 2013 18:07:22 +0000 Received: by mail-qe0-f73.google.com with SMTP id 6so566538qea.2 for ; Tue, 24 Sep 2013 11:06:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/BtaFCjig0dpGY2lsvzgsB9fUihqIwGk6bVegxy/mIs=; b=jx4DP9vUeOlHRluCrpr+P4gbohPl1o9RQ41Aa4DfUgCgSXWGgOuTPE+htaMc71To/7 2eP7Di/qBDlSx+pLznxdRRS7hXXCg93+WaUE7Pk8hxRrW4ikNxTUgN1dAdVgNAZpzOK6 9Quy0WhOhXU46hDkMjMEsO09Sk71VzVpep+LzjuhdjVid+ZsK9/ERnvFJJiLHRv98a70 1I1VCYwiyPyAiIIjmyNFY0mWDOgVpb3uP5l7j9AJDimzTjMwZKVGgR3NbQ7QMGKql9S3 us/PZlP5Pvsqy+vpOH6sdOP+y3GnCUbkA393LT4eXud1Yw+YBV+tMexEna9TslNtU/9i 5yxQ== X-Gm-Message-State: ALoCoQmVZSZ7Djvfol4Ys8Rgjrx1NGyyBtRFxEk+4L6VqZIU1CV6s6uGqFsHYe6Cuc8A8GDRqTK0vXcoyLNRHKOFQeb4VjA7+BcB0OFle6KOZeLUnNXm76CZYZqkRCVWyK8lhV9jOg4sLjpK+6leFILbU1DzU8En9LYXLT31OP0G+9FGAqn4ZJCk/NzX6KhbcGR7e6bcl317zebw/ablxhQKvVqfEVwuaQ== X-Received: by 10.236.186.101 with SMTP id v65mr9129692yhm.12.1380046019763; Tue, 24 Sep 2013 11:06:59 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id s21si4564328yhc.1.1969.12.31.16.00.00 (version=TLSv1.1 cipher=AES128-SHA bits=128/128); Tue, 24 Sep 2013 11:06:59 -0700 (PDT) Received: from abrestic.mtv.corp.google.com (abrestic.mtv.corp.google.com [172.22.72.111]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id 7A86B5A4214; Tue, 24 Sep 2013 11:06:59 -0700 (PDT) Received: by abrestic.mtv.corp.google.com (Postfix, from userid 137652) id 22E11220A39; Tue, 24 Sep 2013 11:06:58 -0700 (PDT) From: Andrew Bresticker To: linux-samsung-soc@vger.kernel.org, Tomasz Figa , Sylwester Nawrocki Subject: [PATCH V3 1/6] clk: exynos-audss: convert to platform device Date: Tue, 24 Sep 2013 11:06:51 -0700 Message-Id: <1380046016-5811-1-git-send-email-abrestic@chromium.org> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1379982078-23381-1-git-send-email-abrestic@chromium.org> References: <1379982078-23381-1-git-send-email-abrestic@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130924_140721_513237_D2A919C8 X-CRM114-Status: GOOD ( 20.25 ) X-Spam-Score: -1.5 (-) Cc: Mark Rutland , linux-doc@vger.kernel.org, Andrew Bresticker , linux-kernel@vger.kernel.org, Tushar Behera , Kukjin Kim , Russell King , Sachin Kamat , Stephen Warren , Grant Likely , devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , Rob Herring , Mike Turquette , linux-arm-kernel@lists.infradead.org, Rahul Sharma , Padmavathi Venna , Jiri Kosina , Stephen Boyd , Doug Anderson , Leela Krishna Amudala , Rob Landley X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.1 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Exynos AudioSS clock controller will later be modified to allow input clocks to be specified via device-tree in order to support multiple Exynos SoCs. This will introduce a dependency on the core SoC clock controller being initialized first so that the AudioSS driver can look up its input clocks, but the order in which clock providers are probed in of_clk_init() is not guaranteed. Since deferred probing is not supported in of_clk_init() and the AudioSS block is not the core controller, we can initialize it later as a platform device. Signed-off-by: Andrew Bresticker Acked-by: Tomasz Figa Reviewed-by: Sylwester Nawrocki --- Changes since v2: - add error handling to probe callback - fixed ordering of of_clk_{add,del}_provider - fixed nits from Tomasz and Sylwester Changes since v1: - add clk_unregister() calls to remove callback - fixed minor nits from Tomasz --- drivers/clk/samsung/clk-exynos-audss.c | 109 +++++++++++++++++++++++++++------ 1 file changed, 90 insertions(+), 19 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c index 39b40aa..319c6e4 100644 --- a/drivers/clk/samsung/clk-exynos-audss.c +++ b/drivers/clk/samsung/clk-exynos-audss.c @@ -14,6 +14,8 @@ #include #include #include +#include +#include #include @@ -62,24 +64,23 @@ static struct syscore_ops exynos_audss_clk_syscore_ops = { #endif /* CONFIG_PM_SLEEP */ /* register exynos_audss clocks */ -static void __init exynos_audss_clk_init(struct device_node *np) +static int exynos_audss_clk_probe(struct platform_device *pdev) { - reg_base = of_iomap(np, 0); - if (!reg_base) { - pr_err("%s: failed to map audss registers\n", __func__); - return; + int i, ret = 0; + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + reg_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(reg_base)) { + dev_err(&pdev->dev, "failed to map audss registers\n"); + return PTR_ERR(reg_base); } - clk_table = kzalloc(sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS, + clk_table = devm_kzalloc(&pdev->dev, + sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS, GFP_KERNEL); - if (!clk_table) { - pr_err("%s: could not allocate clk lookup table\n", __func__); - return; - } - - clk_data.clks = clk_table; - clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS; - of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); + if (!clk_table) + return -ENOMEM; clk_table[EXYNOS_MOUT_AUDSS] = clk_register_mux(NULL, "mout_audss", mout_audss_p, ARRAY_SIZE(mout_audss_p), @@ -123,13 +124,83 @@ static void __init exynos_audss_clk_init(struct device_node *np) "div_pcm0", CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 5, 0, &lock); + for (i = 0; i < EXYNOS_AUDSS_MAX_CLKS; i++) { + if (IS_ERR(clk_table[i])) { + dev_err(&pdev->dev, "failed to regsiter clock %d\n", i); + ret = PTR_ERR(clk_table[i]); + goto unregister; + } + } + + clk_data.clks = clk_table; + clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS; + ret = of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, + &clk_data); + if (ret) { + dev_err(&pdev->dev, "failed to add clock provider\n"); + goto unregister; + } + #ifdef CONFIG_PM_SLEEP register_syscore_ops(&exynos_audss_clk_syscore_ops); #endif - pr_info("Exynos: Audss: clock setup completed\n"); + dev_info(&pdev->dev, "setup completed\n"); + + return 0; + +unregister: + for (i = 0; i < EXYNOS_AUDSS_MAX_CLKS; i++) { + if (!IS_ERR_OR_NULL(clk_table[i])) + clk_unregister(clk_table[i]); + } + + return ret; } -CLK_OF_DECLARE(exynos4210_audss_clk, "samsung,exynos4210-audss-clock", - exynos_audss_clk_init); -CLK_OF_DECLARE(exynos5250_audss_clk, "samsung,exynos5250-audss-clock", - exynos_audss_clk_init); + +static int exynos_audss_clk_remove(struct platform_device *pdev) +{ + int i; + + of_clk_del_provider(pdev->dev.of_node); + + for (i = 0; i < EXYNOS_AUDSS_MAX_CLKS; i++) { + if (!IS_ERR_OR_NULL(clk_table[i])) + clk_unregister(clk_table[i]); + } + + return 0; +} + +static const struct of_device_id exynos_audss_clk_of_match[] = { + { .compatible = "samsung,exynos4210-audss-clock", }, + { .compatible = "samsung,exynos5250-audss-clock", }, + {}, +}; + +static struct platform_driver exynos_audss_clk_driver = { + .driver = { + .name = "exynos-audss-clk", + .owner = THIS_MODULE, + .of_match_table = exynos_audss_clk_of_match, + }, + .probe = exynos_audss_clk_probe, + .remove = exynos_audss_clk_remove, +}; + +static int __init exynos_audss_clk_init(void) +{ + return platform_driver_register(&exynos_audss_clk_driver); +} +core_initcall(exynos_audss_clk_init); + +static void __init exynos_audss_clk_exit(void) +{ + platform_driver_unregister(&exynos_audss_clk_driver); +} +module_exit(exynos_audss_clk_exit); + +MODULE_AUTHOR("Padmavathi Venna "); +MODULE_DESCRIPTION("Exynos Audio Subsystem Clock Controller"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:exynos-audss-clk");