From patchwork Wed Sep 25 08:30:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 2940371 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 978879F2B8 for ; Wed, 25 Sep 2013 08:31:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 79006200F8 for ; Wed, 25 Sep 2013 08:31:44 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 26CF520108 for ; Wed, 25 Sep 2013 08:31:43 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VOkUL-0000fj-SH; Wed, 25 Sep 2013 08:30:26 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VOkU0-0008M6-BD; Wed, 25 Sep 2013 08:30:04 +0000 Received: from tx2ehsobe005.messaging.microsoft.com ([65.55.88.15] helo=tx2outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VOkTL-0008HS-Vg for linux-arm-kernel@lists.infradead.org; Wed, 25 Sep 2013 08:29:27 +0000 Received: from mail200-tx2-R.bigfish.com (10.9.14.239) by TX2EHSOBE007.bigfish.com (10.9.40.27) with Microsoft SMTP Server id 14.1.225.22; Wed, 25 Sep 2013 08:29:01 +0000 Received: from mail200-tx2 (localhost [127.0.0.1]) by mail200-tx2-R.bigfish.com (Postfix) with ESMTP id 83B66540096; Wed, 25 Sep 2013 08:29:01 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: VS3(zcb8kzzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h1de097h8275dhz2dh87h2a8h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h1151h1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail200-tx2 (localhost.localdomain [127.0.0.1]) by mail200-tx2 (MessageSwitch) id 1380097738294777_4765; Wed, 25 Sep 2013 08:28:58 +0000 (UTC) Received: from TX2EHSMHS021.bigfish.com (unknown [10.9.14.246]) by mail200-tx2.bigfish.com (Postfix) with ESMTP id 39DCD38004E; Wed, 25 Sep 2013 08:28:58 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS021.bigfish.com (10.9.99.121) with Microsoft SMTP Server (TLS) id 14.16.227.3; Wed, 25 Sep 2013 08:28:58 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server (TLS) id 14.3.158.2; Wed, 25 Sep 2013 08:28:57 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.61]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id r8P8SpJh003253; Wed, 25 Sep 2013 01:28:56 -0700 From: Shawn Guo To: Subject: [PATCH 2/5] ARM: imx6q: use common soc revision helpers Date: Wed, 25 Sep 2013 16:30:20 +0800 Message-ID: <1380097823-29027-3-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1380097823-29027-1-git-send-email-shawn.guo@linaro.org> References: <1380097823-29027-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130925_042924_391072_3D0213AD X-CRM114-Status: GOOD ( 14.79 ) X-Spam-Score: -4.2 (----) Cc: Shawn Guo , kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It calls imx_set_soc_revision() to set up soc revision in imx6q_init_revision(), and replaces all the occurrences of imx6q_revision() with common helper imx_get_soc_revision(). Signed-off-by: Shawn Guo --- arch/arm/mach-imx/clk-imx6q.c | 5 +++-- arch/arm/mach-imx/common.h | 1 - arch/arm/mach-imx/mach-imx6q.c | 13 ++++--------- 3 files changed, 7 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 913ad85..c681566 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -300,7 +300,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) WARN_ON(!base); /* Audio/video PLL post dividers do not work on i.MX6q revision 1.0 */ - if (cpu_is_imx6q() && imx6q_revision() == IMX_CHIP_REVISION_1_0) { + if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_1_0) { post_div_table[1].div = 1; post_div_table[2].div = 1; video_div_table[1].div = 1; @@ -574,7 +574,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk_register_clkdev(clk[pll4_post_div], "pll4_post_div", NULL); clk_register_clkdev(clk[pll4_audio], "pll4_audio", NULL); - if ((imx6q_revision() != IMX_CHIP_REVISION_1_0) || cpu_is_imx6dl()) { + if ((imx_get_soc_revision() != IMX_CHIP_REVISION_1_0) || + cpu_is_imx6dl()) { clk_set_parent(clk[ldb_di0_sel], clk[pll5_video_div]); clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]); } diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index d87fff1..64b2b9f 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -77,7 +77,6 @@ extern void mxc_restart(enum reboot_mode, const char *); extern void mxc_arch_reset_init(void __iomem *); extern void mxc_arch_reset_init_dt(void); extern int mx53_revision(void); -extern int imx6q_revision(void); extern int mx53_display_revision(void); extern void imx_set_aips(void __iomem *); extern int mxc_device_init(void); diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 85a1b51..2efdbce 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -40,16 +40,10 @@ #include "cpuidle.h" #include "hardware.h" -static u32 chip_revision; - -int imx6q_revision(void) -{ - return chip_revision; -} - static void __init imx6q_init_revision(void) { u32 rev = imx_anatop_get_digprog(); + u32 chip_revision; switch (rev & 0xff) { case 0: @@ -66,6 +60,7 @@ static void __init imx6q_init_revision(void) } mxc_set_cpu_type(rev >> 16 & 0xff); + imx_set_soc_revision(chip_revision); } static void imx6q_restart(enum reboot_mode mode, const char *cmd) @@ -264,7 +259,7 @@ static void __init imx6q_init_late(void) * WAIT mode is broken on TO 1.0 and 1.1, so there is no point * to run cpuidle on them. */ - if (imx6q_revision() > IMX_CHIP_REVISION_1_1) + if (imx_get_soc_revision() > IMX_CHIP_REVISION_1_1) imx6q_cpuidle_init(); if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) { @@ -293,7 +288,7 @@ static void __init imx6q_timer_init(void) of_clk_init(NULL); clocksource_of_init(); imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q", - imx6q_revision()); + imx_get_soc_revision()); } static const char *imx6q_dt_compat[] __initdata = {