From patchwork Wed Sep 25 21:12:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Bresticker X-Patchwork-Id: 2944511 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 748B0BFF05 for ; Wed, 25 Sep 2013 21:14:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 87B6D20583 for ; Wed, 25 Sep 2013 21:14:15 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5DFB820565 for ; Wed, 25 Sep 2013 21:14:14 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VOwP2-0002Fk-II; Wed, 25 Sep 2013 21:13:44 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VOwOs-00073B-FB; Wed, 25 Sep 2013 21:13:34 +0000 Received: from mail-ve0-f202.google.com ([209.85.128.202]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VOwOd-0006yy-DJ for linux-arm-kernel@lists.infradead.org; Wed, 25 Sep 2013 21:13:21 +0000 Received: by mail-ve0-f202.google.com with SMTP id jy13so35209veb.1 for ; Wed, 25 Sep 2013 14:12:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=M3IX/KVqR8WsYJRMpXJHAsx77fTnRkfHaYO4Yox7fO4=; b=DYiExTW/0OkYeC2S3gzU+RWo0IaAcBk0irlsYMegmjrca/ZlaP8BZbcwRPDUJyC+qO J+bqp73f+E7s4etDUuZKuPntGPkfrSgrP64TxY2WGl79Q8jtrtvKDvjKCnKn6tyAQnB3 VNYwqpw9vFHPMMd7F1ciDfAXm1gNC/tkPJTN4Vph9Brw8sgsZ8zQOELlr1L6z5sNV4V2 5R6KgMHQBVjFesSCmU+SolrU+g4u0rsyrf3G3DfS2OUONLNCfcsJdkCCVa2qY/P9P657 wXrCNQYjicCnmo9nfrZzLuFMohpi7QPRRRwbU9iSrHHfwhkJBUX62NR8+SyQHNWLm61N sC1A== X-Gm-Message-State: ALoCoQnTtHDGC02i+2OlYQhknbkH7B7GKDDGb/M4dMFvQxb0i+dGgfhzkrD9MECx3UVQRfhtIHSckTFl2mTxB4X+ZpFZrZMC6Qhf84p1pTNgMess6do/1tbQQZxjWVzjUkY4o+ChRmsST3BSSfKBXzDG1wRxDVnE13ai+C1LST10QruWbNYw+fF4aMHN8ZzChIOdX+zZJZlbrw8oeivQYBR6QcK3wGWh5A== X-Received: by 10.236.167.138 with SMTP id i10mr11760461yhl.9.1380143574432; Wed, 25 Sep 2013 14:12:54 -0700 (PDT) Received: from corp2gmr1-1.hot.corp.google.com (corp2gmr1-1.hot.corp.google.com [172.24.189.92]) by gmr-mx.google.com with ESMTPS id y62si6099047yha.0.1969.12.31.16.00.00 (version=TLSv1.1 cipher=AES128-SHA bits=128/128); Wed, 25 Sep 2013 14:12:54 -0700 (PDT) Received: from abrestic.mtv.corp.google.com (abrestic.mtv.corp.google.com [172.22.72.111]) by corp2gmr1-1.hot.corp.google.com (Postfix) with ESMTP id 2D3FA31C1DA; Wed, 25 Sep 2013 14:12:54 -0700 (PDT) Received: by abrestic.mtv.corp.google.com (Postfix, from userid 137652) id C8AB0220862; Wed, 25 Sep 2013 14:12:53 -0700 (PDT) From: Andrew Bresticker To: Tomasz Figa , Sylwester Nawrocki , linux-samsung-soc@vger.kernel.org, Stephen Boyd Subject: [PATCH V4 1/6] clk: exynos-audss: convert to platform device Date: Wed, 25 Sep 2013 14:12:47 -0700 Message-Id: <1380143572-11741-1-git-send-email-abrestic@chromium.org> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1380046016-5811-1-git-send-email-abrestic@chromium.org> References: <1380046016-5811-1-git-send-email-abrestic@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130925_171319_555493_23E0DEB8 X-CRM114-Status: GOOD ( 20.40 ) X-Spam-Score: -1.2 (-) Cc: Mark Rutland , linux-doc@vger.kernel.org, Andrew Bresticker , linux-kernel@vger.kernel.org, Tushar Behera , Kukjin Kim , Russell King , Sachin Kamat , Stephen Warren , Grant Likely , devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , Rob Herring , Mike Turquette , linux-arm-kernel@lists.infradead.org, Rahul Sharma , Padmavathi Venna , Jiri Kosina , Doug Anderson , Leela Krishna Amudala , Rob Landley X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Exynos AudioSS clock controller will later be modified to allow input clocks to be specified via device-tree in order to support multiple Exynos SoCs. This will introduce a dependency on the core SoC clock controller being initialized first so that the AudioSS driver can look up its input clocks, but the order in which clock providers are probed in of_clk_init() is not guaranteed. Since deferred probing is not supported in of_clk_init() and the AudioSS block is not the core controller, we can initialize it later as a platform device. Signed-off-by: Andrew Bresticker Acked-by: Tomasz Figa Reviewed-by: Sylwester Nawrocki Acked-by: Mike Turquette Acked-by: Mike Turquette --- Changes since v3: - __init -> __exit for module exit function - fixed nits from Sylwester Changes since v2: - add error handling to probe callback - fixed ordering of of_clk_{add,del}_provider - fixed nits from Tomasz and Sylwester Changes since v1: - add clk_unregister() calls to remove callback - fixed minor nits from Tomasz --- drivers/clk/samsung/clk-exynos-audss.c | 104 ++++++++++++++++++++++++++++----- 1 file changed, 88 insertions(+), 16 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c index 39b40aa..742dabc 100644 --- a/drivers/clk/samsung/clk-exynos-audss.c +++ b/drivers/clk/samsung/clk-exynos-audss.c @@ -14,6 +14,8 @@ #include #include #include +#include +#include #include @@ -62,24 +64,26 @@ static struct syscore_ops exynos_audss_clk_syscore_ops = { #endif /* CONFIG_PM_SLEEP */ /* register exynos_audss clocks */ -static void __init exynos_audss_clk_init(struct device_node *np) +static int exynos_audss_clk_probe(struct platform_device *pdev) { - reg_base = of_iomap(np, 0); - if (!reg_base) { - pr_err("%s: failed to map audss registers\n", __func__); - return; + int i, ret = 0; + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + reg_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(reg_base)) { + dev_err(&pdev->dev, "failed to map audss registers\n"); + return PTR_ERR(reg_base); } - clk_table = kzalloc(sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS, + clk_table = devm_kzalloc(&pdev->dev, + sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS, GFP_KERNEL); - if (!clk_table) { - pr_err("%s: could not allocate clk lookup table\n", __func__); - return; - } + if (!clk_table) + return -ENOMEM; clk_data.clks = clk_table; clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS; - of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); clk_table[EXYNOS_MOUT_AUDSS] = clk_register_mux(NULL, "mout_audss", mout_audss_p, ARRAY_SIZE(mout_audss_p), @@ -123,13 +127,81 @@ static void __init exynos_audss_clk_init(struct device_node *np) "div_pcm0", CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 5, 0, &lock); + for (i = 0; i < clk_data.clk_num; i++) { + if (IS_ERR(clk_table[i])) { + dev_err(&pdev->dev, "failed to register clock %d\n", i); + ret = PTR_ERR(clk_table[i]); + goto unregister; + } + } + + ret = of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, + &clk_data); + if (ret) { + dev_err(&pdev->dev, "failed to add clock provider\n"); + goto unregister; + } + #ifdef CONFIG_PM_SLEEP register_syscore_ops(&exynos_audss_clk_syscore_ops); #endif - pr_info("Exynos: Audss: clock setup completed\n"); + dev_info(&pdev->dev, "setup completed\n"); + + return 0; + +unregister: + for (i = 0; i < clk_data.clk_num; i++) { + if (!IS_ERR(clk_table[i])) + clk_unregister(clk_table[i]); + } + + return ret; +} + +static int exynos_audss_clk_remove(struct platform_device *pdev) +{ + int i; + + of_clk_del_provider(pdev->dev.of_node); + + for (i = 0; i < clk_data.clk_num; i++) { + if (!IS_ERR(clk_table[i])) + clk_unregister(clk_table[i]); + } + + return 0; } -CLK_OF_DECLARE(exynos4210_audss_clk, "samsung,exynos4210-audss-clock", - exynos_audss_clk_init); -CLK_OF_DECLARE(exynos5250_audss_clk, "samsung,exynos5250-audss-clock", - exynos_audss_clk_init); + +static const struct of_device_id exynos_audss_clk_of_match[] = { + { .compatible = "samsung,exynos4210-audss-clock", }, + { .compatible = "samsung,exynos5250-audss-clock", }, + {}, +}; + +static struct platform_driver exynos_audss_clk_driver = { + .driver = { + .name = "exynos-audss-clk", + .owner = THIS_MODULE, + .of_match_table = exynos_audss_clk_of_match, + }, + .probe = exynos_audss_clk_probe, + .remove = exynos_audss_clk_remove, +}; + +static int __init exynos_audss_clk_init(void) +{ + return platform_driver_register(&exynos_audss_clk_driver); +} +core_initcall(exynos_audss_clk_init); + +static void __exit exynos_audss_clk_exit(void) +{ + platform_driver_unregister(&exynos_audss_clk_driver); +} +module_exit(exynos_audss_clk_exit); + +MODULE_AUTHOR("Padmavathi Venna "); +MODULE_DESCRIPTION("Exynos Audio Subsystem Clock Controller"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:exynos-audss-clk");