From patchwork Sat Sep 28 19:27:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sylwester Nawrocki X-Patchwork-Id: 2959011 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B22E3BFF0B for ; Sat, 28 Sep 2013 19:32:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B791020218 for ; Sat, 28 Sep 2013 19:32:00 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A4A7E2010A for ; Sat, 28 Sep 2013 19:31:59 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VQ0Ek-0002OL-0P; Sat, 28 Sep 2013 19:31:30 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VQ0Ec-0007wJ-4n; Sat, 28 Sep 2013 19:31:22 +0000 Received: from mail-ee0-x22a.google.com ([2a00:1450:4013:c00::22a]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VQ0EI-0007tM-EP for linux-arm-kernel@lists.infradead.org; Sat, 28 Sep 2013 19:31:06 +0000 Received: by mail-ee0-f42.google.com with SMTP id b45so1856638eek.29 for ; Sat, 28 Sep 2013 12:30:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jm5DXlHK6fvSuShvvlyYtyITw+LnuJ3XTyRzp0m1X/M=; b=IZECjr4PRxEQDDA1XcwCjouXwYfBRV15a1EIXQBChc/ZDO+rV5x4YuJ85WbkcWI5Xe Xs42Hcwu3OfLoKES45D4OxwdC8FGsrG9A3/K5it37ZqYiJtjSJhWkfc10N1yIBq1nxbS kKifkxCWlChyVgk+YOnUGGw+kflKXue85h5G8QB0zVgGGVtMVKI9FemdzYdhXEBN8ZRH LqMkFSa1XjagWDJbCPTr+1VQE5Xp9qZcwls1/6+8slR7/+1Ystas98TARYuextOr+uXt /SP8qJr6JEhfcaCX6DWtY5HN9Pmb18P69IJoa4cDSicvFKNt59BezTBYJ6GYUzwK3l0U Gonw== X-Received: by 10.15.98.194 with SMTP id bj42mr22255474eeb.12.1380396640547; Sat, 28 Sep 2013 12:30:40 -0700 (PDT) Received: from localhost.localdomain (093105185086.warszawa.vectranet.pl. [93.105.185.86]) by mx.google.com with ESMTPSA id f49sm30969241eec.7.1969.12.31.16.00.00 (version=TLSv1 cipher=RC4-SHA bits=128/128); Sat, 28 Sep 2013 12:30:39 -0700 (PDT) From: Sylwester Nawrocki To: kishon@ti.com Subject: [PATCH V5 5/5] ARM: Samsung: Remove the MIPI PHY setup code Date: Sat, 28 Sep 2013 21:27:47 +0200 Message-Id: <1380396467-29278-6-git-send-email-s.nawrocki@samsung.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1380396467-29278-1-git-send-email-s.nawrocki@samsung.com> References: <1380396467-29278-1-git-send-email-s.nawrocki@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130928_153102_827126_725C2D1B X-CRM114-Status: GOOD ( 19.19 ) X-Spam-Score: 1.4 (+) Cc: linux-fbdev@vger.kernel.org, kgene.kim@samsung.com, gregkh@linuxfoundation.org, jg1.han@samsung.com, dh09.lee@samsung.com, linux-samsung-soc@vger.kernel.org, kyungmin.park@samsung.com, tomi.valkeinen@ti.com, Sylwester Nawrocki , plagnioj@jcrosoft.com, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Generic PHY drivers are used to handle the MIPI CSIS and MIPI DSIM DPHYs so we can remove now unused code at arch/arm/plat-samsung. In case there is any board file for S5PV210 platforms using MIPI CSIS/DSIM (not any upstream currently) it should use the generic PHY API to bind the PHYs to respective PHY consumer drivers and a platform device for the PHY provider should be defined. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Acked-by: Felipe Balbi Acked-by: Kukjin Kim --- arch/arm/mach-exynos/include/mach/regs-pmu.h | 5 -- arch/arm/mach-s5pv210/include/mach/regs-clock.h | 4 -- arch/arm/plat-samsung/Kconfig | 5 -- arch/arm/plat-samsung/Makefile | 1 - arch/arm/plat-samsung/setup-mipiphy.c | 60 ----------------------- 5 files changed, 0 insertions(+), 75 deletions(-) delete mode 100644 arch/arm/plat-samsung/setup-mipiphy.c diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h index 57344b7..2cdb63e 100644 --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h @@ -44,11 +44,6 @@ #define S5P_DAC_PHY_CONTROL S5P_PMUREG(0x070C) #define S5P_DAC_PHY_ENABLE (1 << 0) -#define S5P_MIPI_DPHY_CONTROL(n) S5P_PMUREG(0x0710 + (n) * 4) -#define S5P_MIPI_DPHY_ENABLE (1 << 0) -#define S5P_MIPI_DPHY_SRESETN (1 << 1) -#define S5P_MIPI_DPHY_MRESETN (1 << 2) - #define S5P_INFORM0 S5P_PMUREG(0x0800) #define S5P_INFORM1 S5P_PMUREG(0x0804) #define S5P_INFORM2 S5P_PMUREG(0x0808) diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h index 032de66..e345584 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h @@ -147,10 +147,6 @@ #define S5P_HDMI_PHY_CONTROL S5P_CLKREG(0xE804) #define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) #define S5P_DAC_PHY_CONTROL S5P_CLKREG(0xE810) -#define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814) -#define S5P_MIPI_DPHY_ENABLE (1 << 0) -#define S5P_MIPI_DPHY_SRESETN (1 << 1) -#define S5P_MIPI_DPHY_MRESETN (1 << 2) #define S5P_INFORM0 S5P_CLKREG(0xF000) #define S5P_INFORM1 S5P_CLKREG(0xF004) diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 7dfba93..ec882ad 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -395,11 +395,6 @@ config S3C24XX_PWM Support for exporting the PWM timer blocks via the pwm device system -config S5P_SETUP_MIPIPHY - bool - help - Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices - config S3C_SETUP_CAMIF bool help diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 498c7c2..9267d29 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -38,7 +38,6 @@ obj-$(CONFIG_S5P_DEV_UART) += s5p-dev-uart.o obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o obj-$(CONFIG_S3C_SETUP_CAMIF) += setup-camif.o -obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o # DMA support diff --git a/arch/arm/plat-samsung/setup-mipiphy.c b/arch/arm/plat-samsung/setup-mipiphy.c deleted file mode 100644 index 66df315..0000000 --- a/arch/arm/plat-samsung/setup-mipiphy.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co., Ltd. - * - * S5P - Helper functions for MIPI-CSIS and MIPI-DSIM D-PHY control - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include - -static int __s5p_mipi_phy_control(int id, bool on, u32 reset) -{ - static DEFINE_SPINLOCK(lock); - void __iomem *addr; - unsigned long flags; - u32 cfg; - - id = max(0, id); - if (id > 1) - return -EINVAL; - - addr = S5P_MIPI_DPHY_CONTROL(id); - - spin_lock_irqsave(&lock, flags); - - cfg = __raw_readl(addr); - cfg = on ? (cfg | reset) : (cfg & ~reset); - __raw_writel(cfg, addr); - - if (on) { - cfg |= S5P_MIPI_DPHY_ENABLE; - } else if (!(cfg & (S5P_MIPI_DPHY_SRESETN | - S5P_MIPI_DPHY_MRESETN) & ~reset)) { - cfg &= ~S5P_MIPI_DPHY_ENABLE; - } - - __raw_writel(cfg, addr); - spin_unlock_irqrestore(&lock, flags); - - return 0; -} - -int s5p_csis_phy_enable(int id, bool on) -{ - return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN); -} -EXPORT_SYMBOL(s5p_csis_phy_enable); - -int s5p_dsim_phy_enable(struct platform_device *pdev, bool on) -{ - return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN); -} -EXPORT_SYMBOL(s5p_dsim_phy_enable);