From patchwork Tue Oct 15 14:52:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter De Schrijver X-Patchwork-Id: 3046221 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 65FAE9F2B6 for ; Tue, 15 Oct 2013 15:30:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 226E72026C for ; Tue, 15 Oct 2013 15:30:07 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C825E20263 for ; Tue, 15 Oct 2013 15:30:05 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VW64B-0005nB-EN; Tue, 15 Oct 2013 14:57:48 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VW63Q-0002WG-Cu; Tue, 15 Oct 2013 14:57:00 +0000 Received: from hqemgate16.nvidia.com ([216.228.121.65]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VW63E-0002Rq-LI for linux-arm-kernel@lists.infradead.org; Tue, 15 Oct 2013 14:56:49 +0000 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Tue, 15 Oct 2013 07:56:30 -0700 Received: from hqemhub03.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 15 Oct 2013 07:52:03 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 15 Oct 2013 07:52:03 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQEMHUB03.nvidia.com (172.20.150.15) with Microsoft SMTP Server id 8.3.327.1; Tue, 15 Oct 2013 07:56:27 -0700 Received: from sc-daphne.nvidia.com (Not Verified[172.20.232.60]) by hqnvemgw01.nvidia.com with MailMarshal (v7,1,2,5326) id ; Tue, 15 Oct 2013 07:56:27 -0700 Received: from tbergstrom-lnx.nvidia.com (tbergstrom-lnx.nvidia.com [10.21.24.170]) by sc-daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r9FEsojv011368; Tue, 15 Oct 2013 07:56:24 -0700 (PDT) From: Peter De Schrijver To: Peter De Schrijver Subject: [PATCH v3 08/19] clk: tegra: add common infra for DT clocks Date: Tue, 15 Oct 2013 17:52:53 +0300 Message-ID: <1381848794-11761-9-git-send-email-pdeschrijver@nvidia.com> X-Mailer: git-send-email 1.7.7.rc0.72.g4b5ea.dirty In-Reply-To: <1381848794-11761-1-git-send-email-pdeschrijver@nvidia.com> References: <1381848794-11761-1-git-send-email-pdeschrijver@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131015_105648_810669_11BF5C29 X-CRM114-Status: GOOD ( 11.17 ) X-Spam-Score: 0.6 (/) Cc: Mark Rutland , devicetree@vger.kernel.org, Prashant Gaikwad , Mike Turquette , Pawel Moll , Stephen Warren , Ian Campbell , linux-kernel@vger.kernel.org, Rob Herring , Thierry Reding , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hiroshi Doyu X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce a common infrastructure for sharing clock initialization between SoCs. Signed-off-by: Peter De Schrijver --- drivers/clk/tegra/clk.c | 9 +++++++++ drivers/clk/tegra/clk.h | 7 +++++++ 2 files changed, 16 insertions(+), 0 deletions(-) diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c index 1253217..c8c84ce 100644 --- a/drivers/clk/tegra/clk.c +++ b/drivers/clk/tegra/clk.c @@ -214,6 +214,15 @@ void __init tegra_add_of_provider(struct device_node *np) of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); } +struct clk ** __init tegra_lookup_dt_id(int clk_id, + struct tegra_clk *tegra_clk) +{ + if (tegra_clk[clk_id].present) + return &clks[tegra_clk[clk_id].dt_id]; + else + return NULL; +} + tegra_clk_apply_init_table_func tegra_clk_apply_init_table; void __init tegra_clocks_apply_init_table(void) diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index a73a678..be45705 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -568,6 +568,11 @@ struct tegra_clk_duplicate { }, \ } +struct tegra_clk { + int dt_id; + bool present; +}; + void tegra_init_from_table(struct tegra_clk_init_table *tbl, struct clk *clks[], int clk_max); @@ -577,6 +582,8 @@ void tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list, struct tegra_clk_periph_regs *get_reg_bank(int clkid); struct clk **tegra_clk_init(int num, int periph_banks); +struct clk **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk); + void tegra_add_of_provider(struct device_node *np); void tegra114_clock_tune_cpu_trimmers_high(void);