From patchwork Fri Oct 25 20:24:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 3097401 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7099C9F2B8 for ; Fri, 25 Oct 2013 20:26:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9C94F20184 for ; Fri, 25 Oct 2013 20:26:31 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BA6702017D for ; Fri, 25 Oct 2013 20:26:30 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VZnxA-00074Q-1T; Fri, 25 Oct 2013 20:25:52 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VZnwx-0004ZP-JL; Fri, 25 Oct 2013 20:25:39 +0000 Received: from smtp.codeaurora.org ([198.145.11.231]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VZnwh-0004Wo-Hc for linux-arm-kernel@lists.infradead.org; Fri, 25 Oct 2013 20:25:25 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id ADB3E13F066; Fri, 25 Oct 2013 20:25:03 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 9D22713F28D; Fri, 25 Oct 2013 20:25:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from agross.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: agross@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id AF66713F29C; Fri, 25 Oct 2013 20:25:02 +0000 (UTC) From: Andy Gross To: Vinod Koul Subject: [PATCH 2/2] dmaengine: msm_bam_dma: Add device tree binding Date: Fri, 25 Oct 2013 15:24:03 -0500 Message-Id: <1382732643-8184-3-git-send-email-agross@codeaurora.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1382732643-8184-1-git-send-email-agross@codeaurora.org> References: <1382732643-8184-1-git-send-email-agross@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131025_162523_733727_21BBF3CC X-CRM114-Status: GOOD ( 14.96 ) X-Spam-Score: -2.3 (--) Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan Huntsman , Andy Gross , Dan Williams , David Brown , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add device tree probe support for the MSM BAM DMA driver. Signed-off-by: Andy Gross --- .../devicetree/bindings/dma/msm_bam_dma.txt | 49 ++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/msm_bam_dma.txt diff --git a/Documentation/devicetree/bindings/dma/msm_bam_dma.txt b/Documentation/devicetree/bindings/dma/msm_bam_dma.txt new file mode 100644 index 0000000..fe3ed8f --- /dev/null +++ b/Documentation/devicetree/bindings/dma/msm_bam_dma.txt @@ -0,0 +1,49 @@ +MSM BAM DMA controller + +Required properties: +- compatible: Should be "qcom,bam" +- reg: Address range for DMA registers +- interrupts: single interrupt for this controller +- #dma-cells: must be <3> +- clocks: required clock +- clock-names: name of clock + +Example: + + dma0: dma@f9984000 = { + compatible = "qcom,bam"; + reg = <0xf9984000 0x15000>; + interrupts = <0 94 0>; + clocks = <&bam_dma_ahb_cxc>; + clock-names = "bam_clk"; + #dma-cells = <3>; + }; + +Client: +Required properties: +- dmas: List of dma channel requests +- dma-names: Names of aforementioned requested channels + +Clients must use the format described in the dma.txt file, using a four cell +specifier for each channel. + +The four cells in order are: + 1. A phandle pointing to the DMA controller + 2. The channel number + 3. The execution environment value for this channel. + 4. Direction of the fixed unidirectional channel + 0 - Memory to Device + 1 - Device to Memory + +Example: + serial@f991e000 { + compatible = "qcom,msm-uart"; + reg = <0xf991e000 0x1000> + <0xf9944000 0x19000>; + interrupts = <0 108 0>; + clocks = <&blsp1_uart2_apps_cxc>, <&blsp1_ahb_cxc>; + clock-names = "gsbi_uart_clk", "gsbi_pclk"; + + dmas = <&dma0 0 0 1>, <&dma0 1 0 0>; + dma-names = "rx", "tx"; + };