From patchwork Tue Nov 5 13:14:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: R Sricharan X-Patchwork-Id: 3141571 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 67165BEEB2 for ; Tue, 5 Nov 2013 13:18:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 265BA200E1 for ; Tue, 5 Nov 2013 13:18:46 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B93A62010F for ; Tue, 5 Nov 2013 13:18:44 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VdgUq-000091-W2; Tue, 05 Nov 2013 13:16:42 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VdgUE-0001Nq-87; Tue, 05 Nov 2013 13:16:02 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VdgTk-0001Gi-S0 for linux-arm-kernel@lists.infradead.org; Tue, 05 Nov 2013 13:15:34 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id rA5DF3pd009784; Tue, 5 Nov 2013 07:15:03 -0600 Received: from DLEE71.ent.ti.com ([157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id rA5DF2oL002710; Tue, 5 Nov 2013 07:15:03 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Tue, 5 Nov 2013 07:15:02 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id rA5DEJLr006849; Tue, 5 Nov 2013 07:14:57 -0600 From: Sricharan R To: , , , , , , , , , , , , , , , , Subject: [PATCH V3 7/7] ARM: DRA: Enable Crossbar IP support for DRA7XX Date: Tue, 5 Nov 2013 18:44:17 +0530 Message-ID: <1383657257-3458-8-git-send-email-r.sricharan@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1383657257-3458-1-git-send-email-r.sricharan@ti.com> References: <1383657257-3458-1-git-send-email-r.sricharan@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131105_081533_026472_37214315 X-CRM114-Status: GOOD ( 11.25 ) X-Spam-Score: -6.9 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enable the crossbar IP support for DRA7xx soc. Cc: Santosh Shilimkar Cc: Rajendra Nayak Cc: Tony Lindgren Signed-off-by: Sricharan R Acked-by: Santosh Shilimkar --- arch/arm/mach-omap2/Kconfig | 1 + arch/arm/mach-omap2/omap4-common.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index b5fb5f7..2086c65 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -141,6 +141,7 @@ config SOC_DRA7XX select ARM_GIC select HAVE_SMP select COMMON_CLK + select IRQ_CROSSBAR comment "OMAP Core Type" depends on ARCH_OMAP2 diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 5791143..274cbfa 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -282,9 +283,12 @@ void __init omap_gic_of_init(void) skip_errata_init: omap_wakeupgen_init(); + if (soc_is_dra7xx()) + crossbar_init(); irqchip_init(); } + #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) static int omap4_twl6030_hsmmc_late_init(struct device *dev) {