From patchwork Fri Nov 8 18:37:12 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 3159361 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9FAFF9F461 for ; Fri, 8 Nov 2013 19:08:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CDE21204D1 for ; Fri, 8 Nov 2013 19:08:32 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BB1352049C for ; Fri, 8 Nov 2013 19:08:31 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Veqxv-0001wF-6k; Fri, 08 Nov 2013 18:39:32 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VeqxI-0002fN-Km; Fri, 08 Nov 2013 18:38:52 +0000 Received: from 82-68-191-81.dsl.posilan.com ([82.68.191.81] helo=rainbowdash.ducie.codethink.co.uk) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Veqw9-0002Y3-NN for linux-arm-kernel@lists.infradead.org; Fri, 08 Nov 2013 18:37:48 +0000 Received: from ben by rainbowdash.ducie.codethink.co.uk with local (Exim 4.80) (envelope-from ) id 1Veqvn-0005UM-TJ; Fri, 08 Nov 2013 18:37:19 +0000 From: Ben Dooks To: linux-arm-kernel@lists.infradead.org, victor.kamensky@linaro.org, taras.kondratiuk@linaro.org Subject: [PATCH 9/9] ARM: asm/opcodes.h: use ARM_HAVE_INST to use .inst to build instructions Date: Fri, 8 Nov 2013 18:37:12 +0000 Message-Id: <1383935832-20865-10-git-send-email-ben.dooks@codethink.co.uk> X-Mailer: git-send-email 1.8.4.rc3 In-Reply-To: <1383935832-20865-1-git-send-email-ben.dooks@codethink.co.uk> References: <1383935832-20865-1-git-send-email-ben.dooks@codethink.co.uk> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131108_133742_138549_878EA4F0 X-CRM114-Status: GOOD ( 11.05 ) X-Spam-Score: -0.3 (/) Cc: Ben Dooks X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently the header uses .work and .short to build instructions. This means the output data does not get marked as an instruction which can cause issues such as BE8 code failures. Signed-off-by: Ben Dooks --- arch/arm/include/asm/opcodes.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h index e796c59..4c7cac1 100644 --- a/arch/arm/include/asm/opcodes.h +++ b/arch/arm/include/asm/opcodes.h @@ -103,9 +103,15 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); #define __opcode_to_mem_arm(x) ___opcode_swab32(x) #define __opcode_to_mem_thumb16(x) ___opcode_swab16(x) #define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x) +#ifdef ARM_HAVE_INST #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x) #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x) #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x) +#else +#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x) +#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x) +#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_identity32(x) +#endif /* !ARM_HAVE_INST */ #else /* ! CONFIG_CPU_ENDIAN_BE8 */ @@ -218,14 +224,27 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); /* Helpers for the helpers. Don't use these directly. */ #ifdef __ASSEMBLY__ +#ifdef ARM_HAVE_INST +#define ___inst_arm(x) .inst x +#define ___inst_thumb16(x) .inst.w x +#define ___inst_thumb32(first, second) .inst.w first, second +#else #define ___inst_arm(x) .long x #define ___inst_thumb16(x) .short x #define ___inst_thumb32(first, second) .short first, second +#endif /* !ARM_HAVE_INST */ +#else +#ifdef ARM_HAVE_INST +#define ___inst_arm(x) ".inst " __stringify(x) "\n\t" +#define ___inst_thumb16(x) ".inst.w " __stringify(x) "\n\t" +#define ___inst_thumb32(first, second) \ + ".inst.w " __stringify(first) ", " __stringify(second) "\n\t" #else #define ___inst_arm(x) ".long " __stringify(x) "\n\t" #define ___inst_thumb16(x) ".short " __stringify(x) "\n\t" #define ___inst_thumb32(first, second) \ ".short " __stringify(first) ", " __stringify(second) "\n\t" +#endif /* !ARM_HAVE_INST */ #endif #endif /* __ASM_ARM_OPCODES_H */