From patchwork Sat Nov 9 07:00:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loc Ho X-Patchwork-Id: 3162041 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BB8A6C045B for ; Sat, 9 Nov 2013 07:02:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C064020445 for ; Sat, 9 Nov 2013 07:02:54 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AFBD8200E5 for ; Sat, 9 Nov 2013 07:02:53 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vf2YH-0007RN-Lu; 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Fri, 08 Nov 2013 23:01:08 -0800 (PST) X-Received: by 10.68.163.33 with SMTP id yf1mr18716472pbb.143.1383980468064; Fri, 08 Nov 2013 23:01:08 -0800 (PST) Received: from localhost ([198.137.200.11]) by mx.google.com with ESMTPSA id gf5sm16602055pbc.22.2013.11.08.23.01.07 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 08 Nov 2013 23:01:07 -0800 (PST) From: Loc Ho To: olof@lixom.net, tj@kernel.org, linux-scsi@vger.kernel.org Subject: [PATCH v2 5/5] Documentation: Add documentation for APM X-Gene SATA DTS binding Date: Sat, 9 Nov 2013 00:00:31 -0700 Message-Id: <1383980431-6572-6-git-send-email-lho@apm.com> X-Mailer: git-send-email 1.5.5 In-Reply-To: <1383980431-6572-5-git-send-email-lho@apm.com> References: <1383980431-6572-1-git-send-email-lho@apm.com> <1383980431-6572-2-git-send-email-lho@apm.com> <1383980431-6572-3-git-send-email-lho@apm.com> <1383980431-6572-4-git-send-email-lho@apm.com> <1383980431-6572-5-git-send-email-lho@apm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131109_020124_795515_4D78D782 X-CRM114-Status: GOOD ( 11.16 ) X-Spam-Score: -4.2 (----) Cc: jcm@redhat.com, Suman Tripathi , Loc Ho , linux-arm-kernel@lists.infradead.org, Tuan Phan X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Documentation: Add documentation for APM X-Gene SATA DTS binding Signed-off-by: Loc Ho Signed-off-by: Tuan Phan Signed-off-by: Suman Tripathi --- .../devicetree/bindings/ata/apm-xgene.txt | 84 ++++++++++++++++++++ 1 files changed, 84 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/apm-xgene.txt diff --git a/Documentation/devicetree/bindings/ata/apm-xgene.txt b/Documentation/devicetree/bindings/ata/apm-xgene.txt new file mode 100644 index 0000000..cd52864 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/apm-xgene.txt @@ -0,0 +1,84 @@ +* APM X-Gene 6.0 Gb/s SATA nodes + +SATA nodes are defined to describe on-chip Serial ATA controllers. +Each SATA controller (pair of ports) have its own node. + +Required properties: +- compatible : Shall be "apm,xgene-ahci" +- reg : First memory resource shall be the AHCI memory resource + Second memory resource shall be the Serdes memory resource + Third memory resource shall be the optional Serdes + memory resource if mux'ed with another IP +- interrupt-parent : Interrupt controller +- interrupts : Interrupt mapping for SATA IRQ +- #clock-cells : Shall be value of 1 +- clocks : Reference to the clock entry +- clock-names : Shall be "eth01clk", "eth23clk", or "eth45clk". + +Optional properties: +- status : Shall be "ok" if enabled or "na" if disabled. Default + is "ok". +- serdes-diff-clk : Shall be 0 for external, 1 internal differential, + or 2 internal single ended clock. Default is 0. +- gen-sel : Shall be 1 (force Gen1), 2 (Force Gen2, or 3 Gen3). + Default is 3. +- EQA1 : Serdes EQ parameter for A1 chip. Default is 9. +- EQ : Serdes EQ parameter for non-A1 chip. Default is 2. +- GENAVG : Enable averaging Serdes calculation. Default is 0 for + A1 chip and 1 for non-A1 chip. +- LBA1 : Serdes loopback buffer for A1 chip. Default is 1; +- LB : Serdes loopback buffer for non-A1 chip. Default is 0; +- LCA1 : Serdes loopback enable control for A1 chip. Default + is 1; +- LC : Serdes loopback enable control for non-A1 chip. + Default is 0; +- CDRA1 : Serdes SPD select CDR for A1 chip. Default is 5. +- CDR : Serdes SPD select CDR for non-A1 chip. Default is 5. +- PQA1 : Serdes PQ for A1 chip. Default is 8. +- PQ : Serdes PQ for non-A1 chip. Default is 0xA. +- coherent : Enable coherent (1 = enable, 0 = disable). + Default is 1. + +Example: + sata0: sata@1a000000 { + compatible = "apm,xgene-ahci"; + reg = <0x0 0x1a000000 0x0 0x100000 + 0x0 0x1f210000 0x0 0x10000>; + interrupt-parent = <&gic>; + interrupts = <0x0 0x86 0x4>; + #clock-cells = <1>; + clocks = <ð01clk 0>; + clock-names = "eth01clk"; + status = "na"; + serdes-diff-clk = <0>; + gen-sel = <3>; + }; + + sata1: sata@1a400000 { + compatible = "apm,xgene-ahci"; + reg = <0x0 0x1a400000 0x0 0x100000 + 0x0 0x1f220000 0x0 0x10000>; + interrupt-parent = <&gic>; + interrupts = <0x0 0x87 0x4>; + #clock-cells = <1>; + clocks = <ð23clk 0>; + clock-names = "eth23clk"; + status = "na"; + serdes-diff-clk = <0>; + gen-sel = <3>; + }; + + sata2: sata@1a800000 { + compatible = "apm,xgene-ahci"; + reg = <0x0 0x1a800000 0x0 0x100000 + 0x0 0x1f230000 0x0 0x10000 + 0x0 0x1f2d0000 0x0 0x10000 >; + interrupt-parent = <&gic>; + interrupts = <0x0 0x88 0x4>; + #clock-cells = <1>; + clocks = <&sata45clk 0>; + clock-names = "sata45clk"; + status = "ok"; + serdes-diff-clk = <0>; + gen-sel = <3>; + };