| Message ID | 1384158718-4756-8-git-send-email-hdoyu@nvidia.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 11/11/2013 01:31 AM, Hiroshi Doyu wrote: > The device, which belongs to the same ASID, can try to enable the same > ASID as the other swgroup devices. This should be allowed but just > skip the actual register write. If the write value is different, it > will return -EINVAL. That's pretty confusing. I'm not at all sure I understand what it means. I /think/ you're saying that multiple devices can exist whose swgroup values are the same, and when setting up those devices, the ASID register for that swgroup gets written multiple times, once per device. This change allows that, assuming that all the different devices attempt to select the same ASID for that swgroup. If so, Giving some specific examples of devices with the same swgroup value would be useful. Along with sternly talking to the HW designers and telling them to just give everything unique IDs:-( > diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c > @@ -346,8 +346,11 @@ static int __smmu_client_set_swgroups(struct smmu_client *c, > offs = SWGROUP_ASID_REG(i); > val = smmu_read(smmu, offs); > if (on) { > - if (WARN_ON(val & mask)) > - goto err_hw_busy; > + if (val) { Why only check this if (val)? Surely the check is valid if (val == 0) too; you don't want to go writing 0 into the ASID register if it's already configured to point at something else? Or, is "val" a bitmask of ASIDs, not an integer representing the ASID? > + if (WARN_ON(val != mask)) > + return -EINVAL; > + goto skip; > + } > val |= mask; ... I guess this would imply it's a bitmask. But then that begs the question: if (on) means that ASID mapping is being enabled, then isn't that invalid if (!mask)?
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 904c36a..70f974c 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -346,8 +346,11 @@ static int __smmu_client_set_swgroups(struct smmu_client *c, offs = SWGROUP_ASID_REG(i); val = smmu_read(smmu, offs); if (on) { - if (WARN_ON(val & mask)) - goto err_hw_busy; + if (val) { + if (WARN_ON(val != mask)) + return -EINVAL; + goto skip; + } val |= mask; } else { WARN_ON((val & mask) == mask); @@ -357,16 +360,8 @@ static int __smmu_client_set_swgroups(struct smmu_client *c, } FLUSH_SMMU_REGS(smmu); c->swgroups = map; +skip: return 0; - -err_hw_busy: - for_each_set_bit(i, bitmap, TEGRA_SWGROUP_MAX) { - offs = SWGROUP_ASID_REG(i); - val = smmu_read(smmu, offs); - val &= ~mask; - smmu_write(smmu, val, offs); - } - return -EBUSY; } static int smmu_client_set_swgroups(struct smmu_client *c, u32 map, int on)
The device, which belongs to the same ASID, can try to enable the same ASID as the other swgroup devices. This should be allowed but just skip the actual register write. If the write value is different, it will return -EINVAL. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> --- Update: This was the part of v3, which isn't used any more. [PATCHv3 10/19] iommu/tegra: smmu: Get "nvidia,swgroups" from DT --- drivers/iommu/tegra-smmu.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-)