From patchwork Thu Nov 14 19:31:57 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loc Ho X-Patchwork-Id: 3184881 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4A6EF9F3AE for ; Thu, 14 Nov 2013 19:33:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 173432089E for ; Thu, 14 Nov 2013 19:33:27 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C699220892 for ; Thu, 14 Nov 2013 19:33:25 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vh2ey-0004Lm-FW; Thu, 14 Nov 2013 19:33:00 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vh2er-0002Kc-ED; Thu, 14 Nov 2013 19:32:53 +0000 Received: from exprod5og106.obsmtp.com ([64.18.0.182]) by merlin.infradead.org with smtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vh2eg-0002IW-Tt for linux-arm-kernel@lists.infradead.org; Thu, 14 Nov 2013 19:32:44 +0000 Received: from mail-pd0-f173.google.com ([209.85.192.173]) (using TLSv1) by exprod5ob106.postini.com ([64.18.4.12]) with SMTP ID DSNKUoUlRdeMoxZ95ncjw+xk6xMsVE3pnOTo@postini.com; Thu, 14 Nov 2013 11:32:42 PST Received: by mail-pd0-f173.google.com with SMTP id x10so2415861pdj.4 for ; Thu, 14 Nov 2013 11:32:20 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZM8aLrBPsHsNOi8hNJJ5gHxE1GEQAI0iawbav3ZPVVc=; b=WwDa3lXx8UftJubOrvrqlorwNkLDteq5zOXTvmrR6vNaQDPUHlYlm74au+GjVQUtUV H5mAdR1ThoYyAtSV0pXcnivKSctxnerxG/Tud4tY5INB7Wj0ibzcSOyuzloJKGRwT8H5 sKy8/0cS17BeLHNxPoDW65prW/6MU+Fj4oJRVNtpxXHH1ZscX8vkQQcz/j4DS6gLaHaG Qv1csD+T8FNgQuMsXHK3eg+yA2nSrcVx6zzrow2pdWTkZXThc0Db+AY+SVvlFtsJofB7 Ad/d2k7KeDSYZEN+hA1EAk58fGEjpExaeGFmVN0P8LnAwUj4+wvXP0fOnweYjwp1V1WA 2TAA== X-Gm-Message-State: ALoCoQnIKzxmMmNqxiADXlitsoLQvrpSzNINvd4diCMUO79s6i8+U5yHQBnOD1q6AKcxmxs49We0GDsi7Au5vsT6PykMTEtCVtjvN9ZFCG3sYvKTTh37yXulfFfoQVo6s6zGE31rGXe7GNa2xLjoVSC6Zv1S0yHa4EeLlqqiysNppafbTEZ/ajT3s8ClyU5s3B9wof0nj4A4 X-Received: by 10.68.252.68 with SMTP id zq4mr3035591pbc.154.1384457540815; Thu, 14 Nov 2013 11:32:20 -0800 (PST) X-Received: by 10.68.252.68 with SMTP id zq4mr3035580pbc.154.1384457540701; Thu, 14 Nov 2013 11:32:20 -0800 (PST) Received: from localhost ([198.137.200.11]) by mx.google.com with ESMTPSA id sy10sm982434pac.15.2013.11.14.11.32.19 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 14 Nov 2013 11:32:20 -0800 (PST) From: Loc Ho To: olof@lixom.net, tj@kernel.org, arnd@arndb.de Subject: [PATCH 1/3] Documentation: Add APM X-Gene SoC 6.0Gbps SATA PHY driver binding documentation Date: Thu, 14 Nov 2013 12:31:57 -0700 Message-Id: <1384457519-21335-2-git-send-email-lho@apm.com> X-Mailer: git-send-email 1.5.5 In-Reply-To: <1384457519-21335-1-git-send-email-lho@apm.com> References: <1384457519-21335-1-git-send-email-lho@apm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131114_143243_184142_B9E4A852 X-CRM114-Status: GOOD ( 10.93 ) X-Spam-Score: -4.2 (----) Cc: devicetree@vger.kernel.org, Suman Tripathi , linux-scsi@vger.kernel.org, jcm@redhat.com, linux-ide@vger.kernel.org, Loc Ho , Tuan Phan , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Documentation: Add APM X-Gene SoC 6.0Gbps SATA PHY driver binding documentation Document the DTS binding for the X-Gene SoC SATA PHY driver. Signed-off-by: Loc Ho Signed-off-by: Tuan Phan Signed-off-by: Suman Tripathi Reviewed-by: Arnd Bergmann Reviewed-by: Olof Johansson --- .../devicetree/bindings/ata/apm-xgene.txt | 69 ++++++++++++++++++++ 1 files changed, 69 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/apm-xgene.txt diff --git a/Documentation/devicetree/bindings/ata/apm-xgene.txt b/Documentation/devicetree/bindings/ata/apm-xgene.txt new file mode 100644 index 0000000..d18db67 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/apm-xgene.txt @@ -0,0 +1,69 @@ +* APM X-Gene 6.0 Gb/s SATA PHY nodes + +SATA PHY nodes are defined to describe on-chip Serial ATA PHY. Each SATA PHY +(pair of PHY) has its own node. + +Required properties: +- compatible : Shall be "apm,xgene-ahci-phy" +- reg : First memory resource shall be the PHY memory resource + Second memory resource shall be the optional PHY + memory resource if mux'ed with another IP +- id : PHY ID (0 = first, 1 = second, 2 = third) +- #phy-cells : Shall be 0 + +Optional properties: +- status : Shall be "ok" if enabled or "na" if disabled. Default + is "ok". +- CTLE0 : PHY override parameters for channel 0 register REG1 + field CTLE_EQ. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x2. +- CTLE1 : PHY override parameters for channel 1 register REG1 + field CTLE_EQ. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x2. +- PQ0 : PHY override parameters for channel 0 register REG125 + field PQ_REG. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0xA. +- PQ1 : PHY override parameters for channel 1 register REG125 + field PQ_REG. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0xA. +- PQS0 : PHY override parameters for channel 0 register REG125 + field PQ_SIGN. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x1. +- PQS1 : PHY override parameters for channel 1 register REG125 + field PQ_SIGN. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x1. +- SPD0 : PHY override parameters for channel 0 register REG61 + field PQ_SIGN. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x5. +- SPD1 : PHY override parameters for channel 1 register REG61 + field PQ_SIGN. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x5. + +NOTE: PHY override parameters are board specific setting. + +Example: + sataphy0: sataphy@1f210000 { + compatible = "apm,xgene-ahci-phy"; + id = <0>; + reg = <0x0 0x1f210000 0x0 0x10000>; + #phy-cells = <0>; + status = "na"; + }; + + sataphy1: sataphy@1f220000 { + compatible = "apm,xgene-ahci-phy"; + id = <1>; + reg = <0x0 0x1f220000 0x0 0x10000>; + #phy-cells = <0>; + status = "ok"; + }; + + sataphy2: sataphy@1f230000 { + compatible = "apm,xgene-ahci-phy"; + id = <2>; + reg = <0x0 0x1f230000 0x0 0x10000 + 0x0 0x1f2d0000 0x0 0x10000 >; + #phy-cells = <0>; + status = "ok"; + }; +