From patchwork Tue Nov 19 06:49:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Victor Kamensky X-Patchwork-Id: 3200281 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 91B2BC045B for ; Tue, 19 Nov 2013 06:51:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B121C2034E for ; Tue, 19 Nov 2013 06:51:27 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 59FEB2034D for ; Tue, 19 Nov 2013 06:51:26 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vif9G-0002Qf-G3; Tue, 19 Nov 2013 06:50:58 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vif9A-0007p8-3z; Tue, 19 Nov 2013 06:50:52 +0000 Received: from mail-pd0-f174.google.com ([209.85.192.174]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vif8y-0007na-4Y for linux-arm-kernel@lists.infradead.org; Tue, 19 Nov 2013 06:50:41 +0000 Received: by mail-pd0-f174.google.com with SMTP id y13so1515844pdi.33 for ; Mon, 18 Nov 2013 22:50:15 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=eT9xPLrKb4YYYJsIRNuVz1BFdKrge2cQhDYyRAdsIM0=; b=MlcfYEtXfeJabTVNySla6yIfyIK2e8UgI9WLB3UPlb78Zm6rAl+bzUUZX3L8/dRdYk RJT6NXkesO57gYsqj5eQG+DxZIPBsjw3pkEeYlMOK5t6EfODRI+n7hRnDOwM1jGaybv2 +elKWiyiV3sGkJuyVIasJJHJvaVlIBSQEpVpSlV56kncTAcdLkCUZ4jAEUvD8zsU2u6i V8977Kt4K7G1315TGSPEleCZBU/hCo6qWXxfX5HNhG7eEHgn6/GsjAulm4iwAGvFpE+r JqjSNMdvyh4rIXp/lH69ELVsZSfuBki7/IAJTVTzEBInEFaVZMwQOWwcelZNCJaxpvjk yuuw== X-Gm-Message-State: ALoCoQlZHfXv/79bFkKoGSQP8N7BsPGNJu9ZDOFyTSUoCEk9qYekf0oySWq7P1XFzkUBflspGujF X-Received: by 10.68.106.98 with SMTP id gt2mr17274015pbb.61.1384843815053; Mon, 18 Nov 2013 22:50:15 -0800 (PST) Received: from kamensky-w530.cisco.com.com (128-107-239-233.cisco.com. [128.107.239.233]) by mx.google.com with ESMTPSA id pu5sm31894731pac.21.2013.11.18.22.50.13 for (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128/128); Mon, 18 Nov 2013 22:50:14 -0800 (PST) From: Victor Kamensky To: linux-arm-kernel@lists.infradead.org, Dave.Martin@arm.com, ben.dooks@codethink.co.uk, u.kleine-koenig@pengutronix.de Subject: [PATCH v3] ARM: signal: fix armv7-m build issue in sigreturn_codes.S Date: Mon, 18 Nov 2013 22:49:50 -0800 Message-Id: <1384843790-14394-2-git-send-email-victor.kamensky@linaro.org> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1384843790-14394-1-git-send-email-victor.kamensky@linaro.org> References: <1384843790-14394-1-git-send-email-victor.kamensky@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131119_015040_284136_8E583B03 X-CRM114-Status: UNSURE ( 9.14 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) Cc: nicolas.pitre@linaro.org, linaro-kernel@lists.linaro.org, patches@linaro.org, taras.kondratiuk@linaro.org, Victor Kamensky , will.deacon@arm.com, rmk@arm.linux.org.uk X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP After "ARM: signal: sigreturn_codes should be endian neutral to work in BE8" commit, thumb only platforms, like armv7m, fails to compile sigreturn_codes.S. The reason is that for such arch values '.arm' directive and arm opcodes are not allowed. Fix conditionally enables arm opcodes only if no CONFIG_CPU_THUMBONLY defined and it uses .org instructions to keep sigreturn_codes layout. Suggested-by: Dave Martin Signed-off-by: Victor Kamensky Tested-by: Uwe Kleine-König --- arch/arm/kernel/sigreturn_codes.S | 40 ++++++++++++++++++++++++++++++--------- 1 file changed, 31 insertions(+), 9 deletions(-) diff --git a/arch/arm/kernel/sigreturn_codes.S b/arch/arm/kernel/sigreturn_codes.S index 3c5d0f2..9d48fe9 100644 --- a/arch/arm/kernel/sigreturn_codes.S +++ b/arch/arm/kernel/sigreturn_codes.S @@ -30,6 +30,27 @@ * snippets. */ +/* + * In CPU_THUMBONLY case kernel arm opcodes are not allowed. + * Note in this case codes skips those instructions but it uses .org + * directive to keep correct layout of sigreturn_codes array. + */ +#ifndef CONFIG_CPU_THUMBONLY +#define ARM_INSTR(code...) code +#else +#define ARM_INSTR(code...) +#endif + +.macro arm_slot n + .org sigreturn_codes + 12 * (\n) +ARM_INSTR( .arm ) +.endm + +.macro thumb_slot n + .org sigreturn_codes + 12 * (\n) + 8 + .thumb +.endm + #if __LINUX_ARM_ARCH__ <= 4 /* * Note we manually set minimally required arch that supports @@ -45,26 +66,27 @@ .global sigreturn_codes .type sigreturn_codes, #object - .arm + .align sigreturn_codes: /* ARM sigreturn syscall code snippet */ - mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) - swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE) +arm_slot 0 +ARM_INSTR(mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)) +ARM_INSTR(swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) /* Thumb sigreturn syscall code snippet */ - .thumb +thumb_slot 0 movs r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) swi #0 /* ARM sigreturn_rt syscall code snippet */ - .arm - mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) - swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE) +arm_slot 1 +ARM_INSTR(mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)) +ARM_INSTR(swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) /* Thumb sigreturn_rt syscall code snippet */ - .thumb +thumb_slot 1 movs r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) swi #0 @@ -74,7 +96,7 @@ sigreturn_codes: * it is thumb case or not, so we need additional * word after real last entry. */ - .arm +arm_slot 2 .space 4 .size sigreturn_codes, . - sigreturn_codes