From patchwork Wed Nov 20 18:08:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 3214981 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A8B64C045B for ; Wed, 20 Nov 2013 19:08:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 750EC2047B for ; Wed, 20 Nov 2013 19:08:54 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 15B732076A for ; Wed, 20 Nov 2013 19:08:53 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjCIK-00042g-D2; Wed, 20 Nov 2013 18:14:33 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjCHc-0001Kj-IL; Wed, 20 Nov 2013 18:13:48 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjCEI-0000rR-Jd for linux-arm-kernel@lists.infradead.org; Wed, 20 Nov 2013 18:10:34 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id rAKIA2O9020335; Wed, 20 Nov 2013 12:10:02 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAKIA2MV013277; Wed, 20 Nov 2013 12:10:02 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.2.342.3; Wed, 20 Nov 2013 12:10:00 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAKI9x6l015732; Wed, 20 Nov 2013 12:10:00 -0600 From: Felipe Balbi To: Tony Lindgren Subject: [RFT/RFC/PATCH 11/31] arm: omap: irq: reorganize code a little bit Date: Wed, 20 Nov 2013 12:08:58 -0600 Message-ID: <1384970958-4118-12-git-send-email-balbi@ti.com> X-Mailer: git-send-email 1.8.4.GIT In-Reply-To: <1384970958-4118-1-git-send-email-balbi@ti.com> References: <1384970958-4118-1-git-send-email-balbi@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131120_131023_125639_C2338329 X-CRM114-Status: GOOD ( 13.08 ) X-Spam-Score: -7.5 (-------) Cc: Linux OMAP Mailing List , Felipe Balbi , Linux ARM Kernel Mailing List X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP no functional changes, just moving code around. Signed-off-by: Felipe Balbi --- arch/arm/mach-omap2/irq.c | 133 +++++++++++++++++++++++----------------------- 1 file changed, 66 insertions(+), 67 deletions(-) diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index b586317..45c5acc 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -57,10 +57,6 @@ * for each bank.. when in doubt, consult the TRM. */ -static struct irq_domain *domain; -static void __iomem *omap_irq_base; -static int omap_nr_irqs = 96; - /* Structure to save interrupt controller context */ struct omap_intc_regs { u32 sysconfig; @@ -70,6 +66,11 @@ struct omap_intc_regs { u32 ilr[INTCPS_NR_ILR_REGS]; u32 mir[INTCPS_NR_MIR_REGS]; }; +static struct omap_intc_regs intc_context; + +static struct irq_domain *domain; +static void __iomem *omap_irq_base; +static int omap_nr_irqs = 96; /* INTC bank register get/set */ static void intc_writel(u32 reg, u32 val) @@ -82,6 +83,61 @@ static u32 intc_readl(u32 reg) return readl_relaxed(omap_irq_base + reg); } +void omap_intc_save_context(void) +{ + int i; + + intc_context.sysconfig = + intc_readl(INTC_SYSCONFIG); + intc_context.protection = + intc_readl(INTC_PROTECTION); + intc_context.idle = + intc_readl(INTC_IDLE); + intc_context.threshold = + intc_readl(INTC_THRESHOLD); + + for (i = 0; i < omap_nr_irqs; i++) + intc_context.ilr[i] = + intc_readl((INTC_ILR0 + 0x4 * i)); + for (i = 0; i < INTCPS_NR_MIR_REGS; i++) + intc_context.mir[i] = + intc_readl(INTC_MIR0 + (0x20 * i)); +} + +void omap_intc_restore_context(void) +{ + int i; + + intc_writel(INTC_SYSCONFIG, intc_context.sysconfig); + intc_writel(INTC_PROTECTION, intc_context.protection); + intc_writel(INTC_IDLE, intc_context.idle); + intc_writel(INTC_THRESHOLD, intc_context.threshold); + + for (i = 0; i < omap_nr_irqs; i++) + intc_writel(INTC_ILR0 + 0x4 * i, + intc_context.ilr[i]); + + for (i = 0; i < INTCPS_NR_MIR_REGS; i++) + intc_writel(INTC_MIR0 + 0x20 * i, + intc_context.mir[i]); + /* MIRs are saved and restore with other PRCM registers */ +} + +void omap3_intc_prepare_idle(void) +{ + /* + * Disable autoidle as it can stall interrupt controller, + * cf. errata ID i540 for 3430 (all revisions up to 3.1.x) + */ + intc_writel(INTC_SYSCONFIG, 0); +} + +void omap3_intc_resume_idle(void) +{ + /* Re-enable autoidle */ + intc_writel(INTC_SYSCONFIG, 1); +} + /* XXX: FIQ and additional INTC support (only MPU at the moment) */ static void omap_ack_irq(struct irq_data *d) { @@ -125,6 +181,12 @@ int omap_irq_pending(void) return 0; } +void omap3_intc_suspend(void) +{ + /* A pending interrupt would prevent OMAP from entering suspend */ + omap_ack_irq(NULL); +} + static __init void omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) { @@ -257,69 +319,6 @@ void __init omap_intc_of_init(void) of_irq_init(irq_match); } -static struct omap_intc_regs intc_context; - -void omap_intc_save_context(void) -{ - int i; - - intc_context.sysconfig = - intc_readl(INTC_SYSCONFIG); - intc_context.protection = - intc_readl(INTC_PROTECTION); - intc_context.idle = - intc_readl(INTC_IDLE); - intc_context.threshold = - intc_readl(INTC_THRESHOLD); - - for (i = 0; i < omap_nr_irqs; i++) - intc_context.ilr[i] = - intc_readl((INTC_ILR0 + 0x4 * i)); - for (i = 0; i < INTCPS_NR_MIR_REGS; i++) - intc_context.mir[i] = - intc_readl(INTC_MIR0 + (0x20 * i)); -} - -void omap_intc_restore_context(void) -{ - int i; - - intc_writel(INTC_SYSCONFIG, intc_context.sysconfig); - intc_writel(INTC_PROTECTION, intc_context.protection); - intc_writel(INTC_IDLE, intc_context.idle); - intc_writel(INTC_THRESHOLD, intc_context.threshold); - - for (i = 0; i < omap_nr_irqs; i++) - intc_writel(INTC_ILR0 + 0x4 * i, - intc_context.ilr[i]); - - for (i = 0; i < INTCPS_NR_MIR_REGS; i++) - intc_writel(INTC_MIR0 + 0x20 * i, - intc_context.mir[i]); - /* MIRs are saved and restore with other PRCM registers */ -} - -void omap3_intc_suspend(void) -{ - /* A pending interrupt would prevent OMAP from entering suspend */ - omap_ack_irq(NULL); -} - -void omap3_intc_prepare_idle(void) -{ - /* - * Disable autoidle as it can stall interrupt controller, - * cf. errata ID i540 for 3430 (all revisions up to 3.1.x) - */ - intc_writel(INTC_SYSCONFIG, 0); -} - -void omap3_intc_resume_idle(void) -{ - /* Re-enable autoidle */ - intc_writel(INTC_SYSCONFIG, 1); -} - asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) { omap_intc_handle_irq(regs);