From patchwork Wed Nov 20 18:08:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 3214631 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 608939F3A0 for ; Wed, 20 Nov 2013 18:13:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8BF3D20778 for ; Wed, 20 Nov 2013 18:13:50 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 58E922076A for ; Wed, 20 Nov 2013 18:13:49 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjCFx-0002J0-A0; Wed, 20 Nov 2013 18:12:06 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjCFT-0001AS-Rp; Wed, 20 Nov 2013 18:11:35 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VjCEA-0000qc-2z for linux-arm-kernel@lists.infradead.org; Wed, 20 Nov 2013 18:10:17 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id rAKI9soU028051; Wed, 20 Nov 2013 12:09:54 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAKI9skr013070; Wed, 20 Nov 2013 12:09:54 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Wed, 20 Nov 2013 12:09:54 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAKI9r3M005835; Wed, 20 Nov 2013 12:09:53 -0600 From: Felipe Balbi To: Tony Lindgren Subject: [RFT/RFC/PATCH 07/31] arm: omap: irq: switch over to intc_readl on omap_intc_handle_irq Date: Wed, 20 Nov 2013 12:08:54 -0600 Message-ID: <1384970958-4118-8-git-send-email-balbi@ti.com> X-Mailer: git-send-email 1.8.4.GIT In-Reply-To: <1384970958-4118-1-git-send-email-balbi@ti.com> References: <1384970958-4118-1-git-send-email-balbi@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131120_131014_304257_69AA5448 X-CRM114-Status: GOOD ( 10.62 ) X-Spam-Score: -7.5 (-------) Cc: Linux OMAP Mailing List , Felipe Balbi , Linux ARM Kernel Mailing List X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP an almost blind conversion from readl_relaxed to our newly introduced intc_readl(). While at that, also remove some hardcoded register addresses. Signed-off-by: Felipe Balbi --- arch/arm/mach-omap2/irq.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 0772a3db..0fe790c 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -41,11 +41,13 @@ #define INTC_MIR_CLEAR0 0x0088 #define INTC_MIR_SET0 0x008c #define INTC_PENDING_IRQ0 0x0098 +#define INTC_PENDING_IRQ1 0x00b8 +#define INTC_PENDING_IRQ2 0x00d8 +#define INTC_PENDING_IRQ3 0x00f8 #define INTC_ILR0 0x0100 #define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) #define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) -#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */ #define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ #define INTCPS_NR_ILR_REGS 128 #define INTCPS_NR_MIR_REGS 3 @@ -191,26 +193,26 @@ static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs u32 irqnr; do { - irqnr = readl_relaxed(base_addr + 0x98); + irqnr = intc_readl(INTC_PENDING_IRQ0); if (irqnr) goto out; - irqnr = readl_relaxed(base_addr + 0xb8); + irqnr = intc_readl(INTC_PENDING_IRQ1); if (irqnr) goto out; - irqnr = readl_relaxed(base_addr + 0xd8); + irqnr = intc_readl(INTC_PENDING_IRQ2); #if IS_ENABLED(CONFIG_SOC_TI81XX) || IS_ENABLED(CONFIG_SOC_AM33XX) if (irqnr) goto out; - irqnr = readl_relaxed(base_addr + 0xf8); + irqnr = intc_readl(INTC_PENDING_IRQ3); #endif out: if (!irqnr) break; - irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET); + irqnr = intc_readl(INTC_SIR); irqnr &= ACTIVEIRQ_MASK; if (irqnr) {